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From: Bjorn Helgaas <helgaas@kernel.org>
To: Wei Huang <wei.huang2@amd.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org, netdev@vger.kernel.org,
	bhelgaas@google.com, corbet@lwn.net, davem@davemloft.net,
	edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
	alex.williamson@redhat.com, gospo@broadcom.com,
	michael.chan@broadcom.com, ajit.khaparde@broadcom.com,
	somnath.kotur@broadcom.com, andrew.gospodarek@broadcom.com,
	manoj.panicker2@amd.com, Eric.VanTassell@amd.com,
	vadim.fedorenko@linux.dev, horms@kernel.org,
	bagasdotme@gmail.com
Subject: Re: [PATCH V2 5/9] PCI/TPH: Introduce API functions to manage steering tags
Date: Fri, 7 Jun 2024 12:45:42 -0500	[thread overview]
Message-ID: <20240607174542.GA853103@bhelgaas> (raw)
In-Reply-To: <20240531213841.3246055-6-wei.huang2@amd.com>

On Fri, May 31, 2024 at 04:38:37PM -0500, Wei Huang wrote:
> This patch introduces three API functions, pcie_tph_intr_vec_supported(),
> pcie_tph_get_st() and pcie_tph_set_st(), for a driver to query, retrieve
> or configure device's steering tags. There are two possible locations for
> steering tag table and the code automatically figure out the right
> location to set the tags if pcie_tph_set_st() is called. Note the tag
> value is always zero currently and will be extended in the follow-up
> patches.

> +static int tph_get_reg_field_u32(struct pci_dev *dev, u8 offset, u32 mask,
> +				 u8 shift, u32 *field)
> +{
> +	u32 reg_val;
> +	int ret;
> +
> +	if (!dev->tph_cap)
> +		return -EINVAL;
> +
> +	ret = pci_read_config_dword(dev, dev->tph_cap + offset, &reg_val);
> +	if (ret)
> +		return ret;
> +
> +	*field = (reg_val & mask) >> shift;
> +
> +	return 0;
> +}
> +
> +static int tph_get_table_size(struct pci_dev *dev, u16 *size_out)
> +{
> +	int ret;
> +	u32 tmp;
> +
> +	ret = tph_get_reg_field_u32(dev, PCI_TPH_CAP,
> +				    PCI_TPH_CAP_ST_MASK,
> +				    PCI_TPH_CAP_ST_SHIFT, &tmp);

Just use FIELD_GET() instead.

> +	if (ret)
> +		return ret;
> +
> +	*size_out = (u16)tmp;
> +
> +	return 0;
> +}
> +
> +/*
> + * For a given device, return a pointer to the MSI table entry at msi_index.

s/MSI/MSI-X/ to avoid any possible confusion.

> +static void __iomem *tph_msix_table_entry(struct pci_dev *dev,
> +					  u16 msi_index)

> +	ret = pcie_capability_read_dword(rp, PCI_EXP_DEVCAP2, &val);
> +	if (ret) {
> +		pr_err("cannot read device capabilities 2 of %s\n",
> +		       dev_name(&dev->dev));

Never use pr_err() when you can use pci_err() instead.  Obviously no
dev_name() needed with pci_err().  Other instances below.

> +	val &= PCI_EXP_DEVCAP2_TPH_COMP;
> +
> +	return val >> PCI_EXP_DEVCAP2_TPH_COMP_SHIFT;

FIELD_GET()

> + * The PCI Specification version 5.0 requires the "No ST Mode" mode
> + * be supported by any compatible device.

Cite r6.0 or newer and include section number.

> +	/* clear the mode select and enable fields and set new values*/

Space before closing */

> +	ctrl_reg &= ~(PCI_TPH_CTRL_REQ_EN_MASK);
> +	ctrl_reg |= (((u32)req_type << PCI_TPH_CTRL_REQ_EN_SHIFT) &
> +			PCI_TPH_CTRL_REQ_EN_MASK);

FIELD_GET()/FIELD_PREP()

> +static bool pcie_tph_write_st(struct pci_dev *dev, unsigned int msix_nr,
> +			      u8 req_type, u16 tag)

This function is not a predicate and testing for true/false gives no
indication of the sense.

For typical functions that do read/write/etc, returning 0 means
success and -errno means failure.  This is the opposite.

> +	/*
> +	 * disable TPH before updating the tag to avoid potential instability
> +	 * as cautioned about in the "ST Table Programming" of PCI-E spec

s/disable/Disable/

"PCIe r6.0, sec ..."

> +bool pcie_tph_set_st(struct pci_dev *dev, unsigned int msix_nr,
> +		     unsigned int cpu, enum tph_mem_type mem_type,
> +		     u8 req_type)

Should return 0 or -errno.

  parent reply	other threads:[~2024-06-07 17:45 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-31 21:38 [PATCH V2 0/9] PCIe TPH and cache direct injection support Wei Huang
2024-05-31 21:38 ` [PATCH V2 1/9] PCI: Introduce PCIe TPH support framework Wei Huang
2024-06-07 15:56   ` Jonathan Cameron
2024-06-07 16:27   ` Bjorn Helgaas
2024-05-31 21:38 ` [PATCH V2 2/9] PCI: Add TPH related register definition Wei Huang
2024-06-07 16:17   ` Jonathan Cameron
2024-06-10 20:00     ` Wei Huang
2024-06-07 16:42   ` Bjorn Helgaas
2024-06-10 20:04     ` Wei Huang
2024-05-31 21:38 ` [PATCH V2 3/9] PCI/TPH: Implement a command line option to disable TPH Wei Huang
2024-06-07 16:27   ` Jonathan Cameron
2024-06-07 19:59   ` Bjorn Helgaas
2024-05-31 21:38 ` [PATCH V2 4/9] PCI/TPH: Implement a command line option to force No ST Mode Wei Huang
2024-06-07 16:32   ` Jonathan Cameron
2024-06-07 17:42   ` Bjorn Helgaas
2024-05-31 21:38 ` [PATCH V2 5/9] PCI/TPH: Introduce API functions to manage steering tags Wei Huang
2024-06-06 22:30   ` kernel test robot
2024-06-07 17:29   ` Jonathan Cameron
2024-06-07 17:45   ` Bjorn Helgaas [this message]
2024-05-31 21:38 ` [PATCH V2 6/9] PCI/TPH: Retrieve steering tag from ACPI _DSM Wei Huang
2024-06-04 15:30   ` Simon Horman
2024-06-05 19:34     ` Wei Huang
2024-06-07 17:39   ` Jonathan Cameron
2024-06-07 18:43   ` Bjorn Helgaas
2024-05-31 21:38 ` [PATCH V2 7/9] PCI/TPH: Add TPH documentation Wei Huang
2024-06-07 17:43   ` Jonathan Cameron
2024-05-31 21:38 ` [PATCH V2 8/9] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-05-31 21:38 ` [PATCH V2 9/9] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang

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