From: Jason Gunthorpe <jgg@nvidia.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Vasant Hegde <vasant.hegde@amd.com>,
linux-doc@vger.kernel.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, Joerg Roedel <jroedel@suse.de>
Subject: Re: [PATCH] iommu/amd: Add parameter to limit V1 page-sizes to 4 KiB
Date: Wed, 4 Sep 2024 10:03:29 -0300 [thread overview]
Message-ID: <20240904130329.GC3915968@nvidia.com> (raw)
In-Reply-To: <20240904125946.4677-1-joro@8bytes.org>
On Wed, Sep 04, 2024 at 02:59:46PM +0200, Joerg Roedel wrote:
> From: Joerg Roedel <jroedel@suse.de>
>
> Add the 'pgsize_4k' as a valid value to the amd_iommu= command line
> parameter to limit the page-sizes used for V1 page-tables for 4 KiB.
> This is needed to make some devices working when attached to an AMD
> SEV-SNP virtual machine.
Details?
> Signed-off-by: Joerg Roedel <jroedel@suse.de>
> ---
> Documentation/admin-guide/kernel-parameters.txt | 2 ++
> drivers/iommu/amd/amd_iommu.h | 1 +
> drivers/iommu/amd/amd_iommu_types.h | 4 ++++
> drivers/iommu/amd/init.c | 5 +++++
> drivers/iommu/amd/io_pgtable.c | 2 +-
> 5 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index 09126bb8cc9f..3187976ae052 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -339,6 +339,8 @@
> pgtbl_v1 - Use v1 page table for DMA-API (Default).
> pgtbl_v2 - Use v2 page table for DMA-API.
> irtcachedis - Disable Interrupt Remapping Table (IRT) caching.
> + pgsize_4k - Limit the available page-sizes for v1 page-tables
> + to 4 KiB.
Why is this a kernel command line? Surely it should be negotiated
automaticaly with capability registers or ACPI like everone else does
if there is something functionally wrong with the vIOMMU??
If we are doing this we also have a problem on mlx5 devices where
there are too many page sizes in the v1 table and it blows up the ATS
caching. It would be nice to widen this option to limit the page sizes
to other combinations (4k/2M/1G or something).
Jason
next prev parent reply other threads:[~2024-09-04 13:03 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-04 12:59 [PATCH] iommu/amd: Add parameter to limit V1 page-sizes to 4 KiB Joerg Roedel
2024-09-04 13:03 ` Jason Gunthorpe [this message]
2024-09-04 13:15 ` Joerg Roedel
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