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From: Inochi Amaoto <inochiama@gmail.com>
To: "Chen Wang" <unicorn_wang@outlook.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Evan Green" <evan@rivosinc.com>,
	"Charlie Jenkins" <charlie@rivosinc.com>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Jesse Taube" <jesse@rivosinc.com>,
	"Andy Chiu" <andybnac@gmail.com>,
	"Alexandre Ghiti" <alexghiti@rivosinc.com>,
	"Inochi Amaoto" <inochiama@gmail.com>,
	"Samuel Holland" <samuel.holland@sifive.com>,
	"Yong-Xuan Wang" <yongxuan.wang@sifive.com>
Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Yixun Lan <dlan@gentoo.org>, Longbin Li <looong.bin@gmail.com>
Subject: [PATCH v3 2/3] riscv: add ISA extension parsing for bfloat16 ISA extension
Date: Fri,  6 Dec 2024 13:58:28 +0800	[thread overview]
Message-ID: <20241206055829.1059293-3-inochiama@gmail.com> (raw)
In-Reply-To: <20241206055829.1059293-1-inochiama@gmail.com>

Add parsing for Zfbmin, Zvfbfmin, Zvfbfwma ISA extension which
were ratified in 4dc23d62 ("Added Chapter title to BF16") of
the riscv-isa-manual.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
 arch/riscv/include/asm/hwcap.h | 3 +++
 arch/riscv/kernel/cpufeature.c | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index 869da082252a..14cc29f2a723 100644
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -100,6 +100,9 @@
 #define RISCV_ISA_EXT_ZICCRSE		91
 #define RISCV_ISA_EXT_SVADE		92
 #define RISCV_ISA_EXT_SVADU		93
+#define RISCV_ISA_EXT_ZFBFMIN		94
+#define RISCV_ISA_EXT_ZVFBFMIN		95
+#define RISCV_ISA_EXT_ZVFBFWMA		96
 
 #define RISCV_ISA_EXT_XLINUXENVCFG	127
 
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index c0916ed318c2..5cfcab139568 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -341,6 +341,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
 	__RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS),
 	__RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS),
 	__RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA),
+	__RISCV_ISA_EXT_DATA(zfbfmin, RISCV_ISA_EXT_ZFBFMIN),
 	__RISCV_ISA_EXT_DATA(zfh, RISCV_ISA_EXT_ZFH),
 	__RISCV_ISA_EXT_DATA(zfhmin, RISCV_ISA_EXT_ZFHMIN),
 	__RISCV_ISA_EXT_DATA(zca, RISCV_ISA_EXT_ZCA),
@@ -373,6 +374,8 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
 	__RISCV_ISA_EXT_SUPERSET(zve64d, RISCV_ISA_EXT_ZVE64D, riscv_zve64d_exts),
 	__RISCV_ISA_EXT_SUPERSET(zve64f, RISCV_ISA_EXT_ZVE64F, riscv_zve64f_exts),
 	__RISCV_ISA_EXT_SUPERSET(zve64x, RISCV_ISA_EXT_ZVE64X, riscv_zve64x_exts),
+	__RISCV_ISA_EXT_DATA(zvfbfmin, RISCV_ISA_EXT_ZVFBFMIN),
+	__RISCV_ISA_EXT_DATA(zvfbfwma, RISCV_ISA_EXT_ZVFBFWMA),
 	__RISCV_ISA_EXT_DATA(zvfh, RISCV_ISA_EXT_ZVFH),
 	__RISCV_ISA_EXT_DATA(zvfhmin, RISCV_ISA_EXT_ZVFHMIN),
 	__RISCV_ISA_EXT_DATA(zvkb, RISCV_ISA_EXT_ZVKB),
-- 
2.47.1


  parent reply	other threads:[~2024-12-06  5:59 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-06  5:58 [PATCH v3 0/3] riscv: Add bfloat16 instruction support Inochi Amaoto
2024-12-06  5:58 ` [PATCH v3 1/3] dt-bindings: riscv: add bfloat16 ISA extension description Inochi Amaoto
2024-12-16 22:00   ` Samuel Holland
2024-12-16 22:51     ` Jessica Clarke
2024-12-19  0:36       ` Samuel Holland
2024-12-06  5:58 ` Inochi Amaoto [this message]
2025-02-10 14:38   ` [PATCH v3 2/3] riscv: add ISA extension parsing for bfloat16 ISA extension Clément Léger
2025-02-11  0:42     ` Inochi Amaoto
2025-02-11 13:45       ` Conor Dooley
2025-02-11 23:26         ` Inochi Amaoto
2024-12-06  5:58 ` [PATCH v3 3/3] riscv: hwprobe: export " Inochi Amaoto
2024-12-16 16:00   ` Yangyu Chen
2024-12-17  0:40     ` Inochi Amaoto
2024-12-17 12:11       ` Conor Dooley
2025-03-27  3:24 ` [PATCH v3 0/3] riscv: Add bfloat16 instruction support patchwork-bot+linux-riscv

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