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From: "Mikołaj Lenczewski" <miko.lenczewski@arm.com>
To: ryan.roberts@arm.com, suzuki.poulose@arm.com,
	yang@os.amperecomputing.com, corbet@lwn.net,
	catalin.marinas@arm.com, will@kernel.org,
	jean-philippe@linaro.org, robin.murphy@arm.com, joro@8bytes.org,
	akpm@linux-foundation.org, ardb@kernel.org, mark.rutland@arm.com,
	joey.gouly@arm.com, maz@kernel.org, james.morse@arm.com,
	broonie@kernel.org, oliver.upton@linux.dev, baohua@kernel.org,
	david@redhat.com, ioworker0@gmail.com, jgg@ziepe.ca,
	nicolinc@nvidia.com, mshavit@google.com, jsnitsel@redhat.com,
	smostafa@google.com, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev
Cc: "Mikołaj Lenczewski" <miko.lenczewski@arm.com>
Subject: [PATCH v4 3/3] arm64/mm: Elide tlbi in contpte_convert() under BBML2
Date: Wed, 19 Mar 2025 15:05:34 +0000	[thread overview]
Message-ID: <20250319150533.37440-5-miko.lenczewski@arm.com> (raw)
In-Reply-To: <20250319150533.37440-2-miko.lenczewski@arm.com>

When converting a region via contpte_convert() to use mTHP, we have two
different goals. We have to mark each entry as contiguous, and we would
like to smear the dirty and young (access) bits across all entries in
the contiguous block. Currently, we do this by first accumulating the
dirty and young bits in the block, using an atomic
__ptep_get_and_clear() and the relevant pte_{dirty,young}() calls,
performing a tlbi, and finally smearing the correct bits across the
block using __set_ptes().

This approach works fine for BBM level 0, but with support for BBM level
2 we are allowed to reorder the tlbi to after setting the pagetable
entries. We expect the time cost of a tlbi to be much greater than the
cost of clearing and resetting the PTEs. As such, this reordering of the
tlbi outside the window where our PTEs are invalid greatly reduces the
duration the PTE are visibly invalid for other threads. This reduces the
likelyhood of a concurrent page walk finding an invalid PTE, reducing
the likelyhood of a fault in other threads, and improving performance
(more so when there are more threads).

Because we support via allowlist only bbml2 implementations that never
raise conflict aborts and instead invalidate the tlb entries
automatically in hardware, we can avoid the final flush altogether.
Avoiding flushes is a win.

Signed-off-by: Mikołaj Lenczewski <miko.lenczewski@arm.com>
Reviewed-by: Ryan Roberts <ryan.roberts@arm.com>
---
 arch/arm64/mm/contpte.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/mm/contpte.c b/arch/arm64/mm/contpte.c
index 55107d27d3f8..77ed03b30b72 100644
--- a/arch/arm64/mm/contpte.c
+++ b/arch/arm64/mm/contpte.c
@@ -68,7 +68,8 @@ static void contpte_convert(struct mm_struct *mm, unsigned long addr,
 			pte = pte_mkyoung(pte);
 	}
 
-	__flush_tlb_range(&vma, start_addr, addr, PAGE_SIZE, true, 3);
+	if (!system_supports_bbml2_noabort())
+		__flush_tlb_range(&vma, start_addr, addr, PAGE_SIZE, true, 3);
 
 	__set_ptes(mm, start_addr, start_ptep, pte, CONT_PTES);
 }
-- 
2.48.1


      parent reply	other threads:[~2025-03-19 15:06 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-19 15:05 [PATCH v4 0/3] Initial BBML2 support for contpte_convert() Mikołaj Lenczewski
2025-03-19 15:05 ` [PATCH v4 1/3] arm64: Add BBM Level 2 cpu feature Mikołaj Lenczewski
2025-03-20 13:24   ` Suzuki K Poulose
2025-03-20 17:09     ` Mikołaj Lenczewski
2025-03-20 17:11       ` Suzuki K Poulose
2025-03-20 17:13         ` Mikołaj Lenczewski
2025-03-20 13:37   ` Ard Biesheuvel
2025-03-20 14:01     ` Ryan Roberts
2025-03-20 17:06     ` Mikołaj Lenczewski
2025-03-19 15:05 ` [PATCH v4 2/3] iommu/arm: Add BBM Level 2 smmu feature Mikołaj Lenczewski
2025-03-19 15:05 ` Mikołaj Lenczewski [this message]

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