From: "Clément Léger" <cleger@rivosinc.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Shuah Khan <shuah@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org
Cc: "Clément Léger" <cleger@rivosinc.com>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Andrew Jones" <ajones@ventanamicro.com>,
"Deepak Gupta" <debug@rivosinc.com>
Subject: [PATCH v7 10/14] riscv: misaligned: add a function to check misalign trap delegability
Date: Thu, 15 May 2025 10:22:11 +0200 [thread overview]
Message-ID: <20250515082217.433227-11-cleger@rivosinc.com> (raw)
In-Reply-To: <20250515082217.433227-1-cleger@rivosinc.com>
Checking for the delegability of the misaligned access trap is needed
for the KVM FWFT extension implementation. Add a function to get the
delegability of the misaligned trap exception.
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/include/asm/cpufeature.h | 9 +++++++++
arch/riscv/kernel/traps_misaligned.c | 17 +++++++++++++++--
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h
index dbe5970d4fe6..09a5183345d4 100644
--- a/arch/riscv/include/asm/cpufeature.h
+++ b/arch/riscv/include/asm/cpufeature.h
@@ -80,6 +80,15 @@ static inline bool unaligned_ctl_available(void)
}
#endif
+#ifdef CONFIG_RISCV_MISALIGNED
+bool misaligned_traps_can_delegate(void);
+#else
+static inline bool misaligned_traps_can_delegate(void)
+{
+ return false;
+}
+#endif
+
bool __init check_vector_unaligned_access_emulated_all_cpus(void);
#if defined(CONFIG_RISCV_VECTOR_MISALIGNED)
void check_vector_unaligned_access_emulated(struct work_struct *work __always_unused);
diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c
index 287ec37021c8..f3ab84bc4632 100644
--- a/arch/riscv/kernel/traps_misaligned.c
+++ b/arch/riscv/kernel/traps_misaligned.c
@@ -726,10 +726,10 @@ static int cpu_online_check_unaligned_access_emulated(unsigned int cpu)
}
#endif
-#ifdef CONFIG_RISCV_SBI
-
static bool misaligned_traps_delegated;
+#ifdef CONFIG_RISCV_SBI
+
static int cpu_online_sbi_unaligned_setup(unsigned int cpu)
{
if (sbi_fwft_set(SBI_FWFT_MISALIGNED_EXC_DELEG, 1, 0) &&
@@ -765,6 +765,7 @@ static int cpu_online_sbi_unaligned_setup(unsigned int cpu __always_unused)
{
return 0;
}
+
#endif
int cpu_online_unaligned_access_init(unsigned int cpu)
@@ -777,3 +778,15 @@ int cpu_online_unaligned_access_init(unsigned int cpu)
return cpu_online_check_unaligned_access_emulated(cpu);
}
+
+bool misaligned_traps_can_delegate(void)
+{
+ /*
+ * Either we successfully requested misaligned traps delegation for all
+ * CPUs, or the SBI does not implement the FWFT extension but delegated
+ * the exception by default.
+ */
+ return misaligned_traps_delegated ||
+ all_cpus_unaligned_scalar_access_emulated();
+}
+EXPORT_SYMBOL_GPL(misaligned_traps_can_delegate);
--
2.49.0
next prev parent reply other threads:[~2025-05-15 8:23 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-15 8:22 [PATCH v7 00/14] riscv: add SBI FWFT misaligned exception delegation support Clément Léger
2025-05-15 8:22 ` [PATCH v7 01/14] riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions Clément Léger
2025-05-15 8:22 ` [PATCH v7 02/14] riscv: sbi: remove useless parenthesis Clément Léger
2025-05-15 8:22 ` [PATCH v7 03/14] riscv: sbi: add new SBI error mappings Clément Léger
2025-05-15 8:22 ` [PATCH v7 04/14] riscv: sbi: add FWFT extension interface Clément Léger
2025-05-15 8:22 ` [PATCH v7 05/14] riscv: sbi: add SBI FWFT extension calls Clément Léger
2025-05-15 8:22 ` [PATCH v7 06/14] riscv: misaligned: request misaligned exception from SBI Clément Léger
2025-05-15 8:22 ` [PATCH v7 07/14] riscv: misaligned: use on_each_cpu() for scalar misaligned access probing Clément Léger
2025-05-15 8:22 ` [PATCH v7 08/14] riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed Clément Léger
2025-05-15 8:22 ` [PATCH v7 09/14] riscv: misaligned: move emulated access uniformity check in a function Clément Léger
2025-05-19 23:32 ` Charlie Jenkins
2025-05-20 8:19 ` Clément Léger
2025-05-20 17:08 ` Charlie Jenkins
2025-05-22 6:49 ` Clément Léger
2025-05-15 8:22 ` Clément Léger [this message]
2025-05-15 8:22 ` [PATCH v7 11/14] RISC-V: KVM: add SBI extension init()/deinit() functions Clément Léger
2025-05-15 8:22 ` [PATCH v7 12/14] RISC-V: KVM: add SBI extension reset callback Clément Léger
2025-05-15 8:22 ` [PATCH v7 13/14] RISC-V: KVM: add support for FWFT SBI extension Clément Léger
2025-05-15 8:22 ` [PATCH v7 14/14] RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG Clément Léger
2025-05-16 23:57 ` Atish Patra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250515082217.433227-11-cleger@rivosinc.com \
--to=cleger@rivosinc.com \
--cc=ajones@ventanamicro.com \
--cc=anup@brainfault.org \
--cc=atishp@atishpatra.org \
--cc=corbet@lwn.net \
--cc=debug@rivosinc.com \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=samuel.holland@sifive.com \
--cc=shuah@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).