linux-doc.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Mario Limonciello <superm1@kernel.org>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>,
	Perry Yuan <perry.yuan@amd.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)),
	"H . Peter Anvin" <hpa@zytor.com>,
	Jonathan Corbet <corbet@lwn.net>, Huang Rui <ray.huang@amd.com>,
	"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	platform-driver-x86@vger.kernel.org (open list:AMD HETERO CORE
	HARDWARE FEEDBACK DRIVER),
	linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT
	AND 64-BIT)), linux-doc@vger.kernel.org (open list:DOCUMENTATION),
	linux-pm@vger.kernel.org (open list:AMD PSTATE DRIVER)
Subject: [PATCH v10 09/13] x86/process: Clear hardware feedback history for AMD processors
Date: Thu, 15 May 2025 16:19:46 -0500	[thread overview]
Message-ID: <20250515211950.3102922-10-superm1@kernel.org> (raw)
In-Reply-To: <20250515211950.3102922-1-superm1@kernel.org>

From: Perry Yuan <perry.yuan@amd.com>

Incorporate a mechanism within the context switching code to reset
the hardware history for AMD processors. Specifically, when a task
is switched in, the class ID was read and reset the hardware workload
classification history of CPU firmware and then it start to trigger
workload classification for the next running thread.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
 arch/x86/kernel/process_64.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index f39ff02e498d7..3ceb93b784013 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -707,6 +707,10 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
 	/* Load the Intel cache allocation PQR MSR. */
 	resctrl_sched_in(next_p);
 
+	/* Reset hw history on AMD CPUs */
+	if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS))
+		wrmsrl(AMD_WORKLOAD_HRST, 0x1);
+
 	return prev_p;
 }
 
-- 
2.43.0


  parent reply	other threads:[~2025-05-15 21:20 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-15 21:19 [PATCH v10 00/13] Add support for AMD hardware feedback interface Mario Limonciello
2025-05-15 21:19 ` [PATCH v10 01/13] Documentation: x86: Add AMD Hardware Feedback Interface documentation Mario Limonciello
2025-05-15 23:13   ` Randy Dunlap
2025-05-15 21:19 ` [PATCH v10 02/13] MAINTAINERS: Add maintainer entry for AMD Hardware Feedback Driver Mario Limonciello
2025-05-15 21:19 ` [PATCH v10 03/13] x86/msr-index: define AMD heterogeneous CPU related MSR Mario Limonciello
2025-05-16  8:46   ` Ingo Molnar
2025-05-15 21:19 ` [PATCH v10 04/13] platform/x86: hfi: Introduce AMD Hardware Feedback Interface Driver Mario Limonciello
2025-05-15 21:22   ` Randy Dunlap
2025-05-15 21:19 ` [PATCH v10 05/13] platform/x86: hfi: parse CPU core ranking data from shared memory Mario Limonciello
2025-05-15 21:19 ` [PATCH v10 06/13] platform/x86: hfi: init per-cpu scores for each class Mario Limonciello
2025-05-15 21:19 ` [PATCH v10 07/13] platform/x86: hfi: add online and offline callback support Mario Limonciello
2025-05-15 21:19 ` [PATCH v10 08/13] platform/x86: hfi: add power management callback Mario Limonciello
2025-05-15 21:19 ` Mario Limonciello [this message]
2025-05-15 21:19 ` [PATCH v10 10/13] cpufreq/amd-pstate: Disable preferred cores on designs with workload classification Mario Limonciello
2025-05-15 21:19 ` [PATCH v10 11/13] platform/x86/amd: hfi: Set ITMT priority from ranking data Mario Limonciello
2025-05-15 21:19 ` [PATCH v10 12/13] platform/x86/amd: hfi: Add debugfs support Mario Limonciello
2025-05-15 21:19 ` [PATCH v10 13/13] x86/itmt: Add debugfs file to show core priorities Mario Limonciello

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250515211950.3102922-10-superm1@kernel.org \
    --to=superm1@kernel.org \
    --cc=bp@alien8.de \
    --cc=corbet@lwn.net \
    --cc=dave.hansen@linux.intel.com \
    --cc=gautham.shenoy@amd.com \
    --cc=hpa@zytor.com \
    --cc=ilpo.jarvinen@linux.intel.com \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=mario.limonciello@amd.com \
    --cc=mingo@redhat.com \
    --cc=perry.yuan@amd.com \
    --cc=platform-driver-x86@vger.kernel.org \
    --cc=rafael@kernel.org \
    --cc=ray.huang@amd.com \
    --cc=tglx@linutronix.de \
    --cc=viresh.kumar@linaro.org \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).