From: Cyan Yang <cyan.yang@sifive.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
corbet@lwn.net, paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, alex@ghiti.fr, samuel.holland@sifive.com
Cc: linux-doc@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Cyan Yang <cyan.yang@sifive.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v2 05/12] dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description
Date: Fri, 16 May 2025 11:03:03 +0800 [thread overview]
Message-ID: <20250516030310.16950-6-cyan.yang@sifive.com> (raw)
In-Reply-To: <20250516030310.16950-1-cyan.yang@sifive.com>
Add "xsfvfnrclipxfqf" ISA extension which is provided by SiFive for
FP32-to-int8 ranged clip instructions support.
Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index d36e7c68d69a..be203df29eb8 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -675,6 +675,12 @@ properties:
See more details in
https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification
+ - const: xsfvfnrclipxfqf
+ description:
+ SiFive FP32-to-int8 Ranged Clip Instructions Extensions Specification.
+ See more details in
+ https://www.sifive.com/document-file/fp32-to-int8-ranged-clip-instructions
+
# T-HEAD
- const: xtheadvector
description:
--
2.39.5 (Apple Git-154)
next prev parent reply other threads:[~2025-05-16 3:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-16 3:02 [PATCH v2 00/12] riscv: Add vendor extensions support for SiFive Cyan Yang
2025-05-16 3:02 ` [PATCH v2 01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description Cyan Yang
2025-05-16 3:03 ` [PATCH v2 02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions Cyan Yang
2025-05-20 9:26 ` Geert Uytterhoeven
2025-05-22 8:20 ` Cyan Yang
2025-05-16 3:03 ` [PATCH v2 03/12] riscv: hwprobe: Document " Cyan Yang
2025-05-16 3:03 ` [PATCH v2 04/12] riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod and xsfqmaccqoq Cyan Yang
2025-05-16 3:03 ` Cyan Yang [this message]
2025-05-16 3:03 ` [PATCH v2 06/12] riscv: Add SiFive xsfvfnrclipxfqf vendor extension Cyan Yang
2025-05-16 3:03 ` [PATCH v2 07/12] riscv: hwprobe: Document " Cyan Yang
2025-05-16 3:03 ` [PATCH v2 08/12] riscv: hwprobe: Add " Cyan Yang
2025-05-16 3:03 ` [PATCH v2 09/12] dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description Cyan Yang
2025-05-16 3:03 ` [PATCH v2 10/12] riscv: Add SiFive xsfvfwmaccqqq vendor extension Cyan Yang
2025-05-16 3:03 ` [PATCH v2 11/12] riscv: hwprobe: Document " Cyan Yang
2025-05-16 3:03 ` [PATCH v2 12/12] riscv: hwprobe: Add " Cyan Yang
2025-06-10 16:28 ` [PATCH v2 00/12] riscv: Add vendor extensions support for SiFive patchwork-bot+linux-riscv
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