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From: Mario Limonciello <superm1@kernel.org>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>,
	Perry Yuan <perry.yuan@amd.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)),
	"H . Peter Anvin" <hpa@zytor.com>,
	Jonathan Corbet <corbet@lwn.net>, Huang Rui <ray.huang@amd.com>,
	"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	platform-driver-x86@vger.kernel.org (open list:AMD HETERO CORE
	HARDWARE FEEDBACK DRIVER),
	linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT
	AND 64-BIT)), linux-doc@vger.kernel.org (open list:DOCUMENTATION),
	linux-pm@vger.kernel.org (open list:AMD PSTATE DRIVER)
Subject: [PATCH v11 09/13] x86/process: Clear hardware feedback history for AMD processors
Date: Mon,  9 Jun 2025 15:05:14 -0500	[thread overview]
Message-ID: <20250609200518.3616080-10-superm1@kernel.org> (raw)
In-Reply-To: <20250609200518.3616080-1-superm1@kernel.org>

From: Perry Yuan <perry.yuan@amd.com>

Incorporate a mechanism within the context switching code to reset
the hardware history for AMD processors. Specifically, when a task
is switched in, the class ID was read and reset the hardware workload
classification history of CPU firmware and then it start to trigger
workload classification for the next running thread.

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v8:
 * Only for 64 bit
---
 arch/x86/kernel/process_64.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 8d6cf25127aab..f386928c472db 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -707,6 +707,10 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
 	/* Load the Intel cache allocation PQR MSR. */
 	resctrl_arch_sched_in(next_p);
 
+	/* Reset hw history on AMD CPUs */
+	if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS))
+		wrmsrl(MSR_AMD_WORKLOAD_HRST, 0x1);
+
 	return prev_p;
 }
 
-- 
2.43.0


  parent reply	other threads:[~2025-06-09 20:05 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-09 20:05 [PATCH v11 00/13] Add support for AMD hardware feedback interface Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 01/13] Documentation: x86: Add AMD Hardware Feedback Interface documentation Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 02/13] MAINTAINERS: Add maintainer entry for AMD Hardware Feedback Driver Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 03/13] x86/msr-index: define AMD heterogeneous CPU related MSR Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 04/13] platform/x86: hfi: Introduce AMD Hardware Feedback Interface Driver Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 05/13] platform/x86: hfi: parse CPU core ranking data from shared memory Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 06/13] platform/x86: hfi: init per-cpu scores for each class Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 07/13] platform/x86: hfi: add online and offline callback support Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 08/13] platform/x86: hfi: add power management callback Mario Limonciello
2025-06-09 20:05 ` Mario Limonciello [this message]
2025-06-09 20:05 ` [PATCH v11 10/13] cpufreq/amd-pstate: Disable preferred cores on designs with workload classification Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 11/13] platform/x86/amd: hfi: Set ITMT priority from ranking data Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 12/13] platform/x86/amd: hfi: Add debugfs support Mario Limonciello
2025-06-09 20:05 ` [PATCH v11 13/13] x86/itmt: Add debugfs file to show core priorities Mario Limonciello
2025-06-23 21:53 ` [PATCH v11 00/13] Add support for AMD hardware feedback interface Mario Limonciello
2025-06-30 10:30 ` Ilpo Järvinen

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