From: Mark Bloch <mbloch@nvidia.com>
To: "David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Eric Dumazet <edumazet@google.com>,
"Andrew Lunn" <andrew+netdev@lunn.ch>,
Simon Horman <horms@kernel.org>
Cc: <saeedm@nvidia.com>, <gal@nvidia.com>, <leonro@nvidia.com>,
<tariqt@nvidia.com>, Leon Romanovsky <leon@kernel.org>,
Jonathan Corbet <corbet@lwn.net>, <netdev@vger.kernel.org>,
<linux-rdma@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
Dragos Tatulea <dtatulea@nvidia.com>,
Mark Bloch <mbloch@nvidia.com>
Subject: [PATCH mlx5-next 1/5] net/mlx5: Small refactor for general object capabilities
Date: Thu, 19 Jun 2025 14:37:17 +0300 [thread overview]
Message-ID: <20250619113721.60201-2-mbloch@nvidia.com> (raw)
In-Reply-To: <20250619113721.60201-1-mbloch@nvidia.com>
From: Dragos Tatulea <dtatulea@nvidia.com>
Make enum for capability bits of general object types depend on
the type definitions themselves.
Make sure that capabilities in the [64,127] bit range are
properly calculated (type id - 64).
Signed-off-by: Dragos Tatulea <dtatulea@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Mark Bloch <mbloch@nvidia.com>
---
include/linux/mlx5/mlx5_ifc.h | 27 ++++++++++++++++-----------
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 2c09df4ee574..5c8f75605eac 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -12501,17 +12501,6 @@ struct mlx5_ifc_affiliated_event_header_bits {
u8 obj_id[0x20];
};
-enum {
- MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = BIT_ULL(0xc),
- MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_IPSEC = BIT_ULL(0x13),
- MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_SAMPLER = BIT_ULL(0x20),
- MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_FLOW_METER_ASO = BIT_ULL(0x24),
-};
-
-enum {
- MLX5_HCA_CAP_2_GENERAL_OBJECT_TYPES_RDMA_CTRL = BIT_ULL(0x13),
-};
-
enum {
MLX5_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = 0xc,
MLX5_GENERAL_OBJECT_TYPES_IPSEC = 0x13,
@@ -12523,6 +12512,22 @@ enum {
MLX5_GENERAL_OBJECT_TYPES_FLOW_TABLE_ALIAS = 0xff15,
};
+enum {
+ MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY =
+ BIT_ULL(MLX5_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY),
+ MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_IPSEC =
+ BIT_ULL(MLX5_GENERAL_OBJECT_TYPES_IPSEC),
+ MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_SAMPLER =
+ BIT_ULL(MLX5_GENERAL_OBJECT_TYPES_SAMPLER),
+ MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_FLOW_METER_ASO =
+ BIT_ULL(MLX5_GENERAL_OBJECT_TYPES_FLOW_METER_ASO),
+};
+
+enum {
+ MLX5_HCA_CAP_2_GENERAL_OBJECT_TYPES_RDMA_CTRL =
+ BIT_ULL(MLX5_GENERAL_OBJECT_TYPES_RDMA_CTRL - 0x40),
+};
+
enum {
MLX5_IPSEC_OBJECT_ICV_LEN_16B,
};
--
2.34.1
next prev parent reply other threads:[~2025-06-19 11:37 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-19 11:37 [PATCH net-next 0/5] net/mlx5e: Add support for PCIe congestion events Mark Bloch
2025-06-19 11:37 ` Mark Bloch [this message]
2025-06-19 11:37 ` [PATCH mlx5-next 2/5] net/mlx5: Add IFC bits for PCIe Congestion Event object Mark Bloch
2025-06-19 11:37 ` [PATCH net-next 3/5] net/mlx5e: Create/destroy " Mark Bloch
2025-06-19 11:37 ` [PATCH net-next 4/5] net/mlx5e: Add device PCIe congestion ethtool stats Mark Bloch
2025-06-19 11:37 ` [PATCH net-next 5/5] net/mlx5e: Make PCIe congestion event thresholds configurable Mark Bloch
2025-06-19 14:55 ` [PATCH net-next 0/5] net/mlx5e: Add support for PCIe congestion events Jakub Kicinski
2025-06-19 16:00 ` Mark Bloch
2025-06-19 19:19 ` Saeed Mahameed
2025-06-19 22:22 ` Jakub Kicinski
2025-06-25 11:37 ` Leon Romanovsky
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