From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB51B2EAB83; Tue, 22 Jul 2025 14:06:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753193219; cv=none; b=hbg5Zd7nD89ldOxLwtOWMHUANyiYE69FUS8AtAG4ypbGBWllQxK1N31aGepeWRNAzOhpU7X7/2c4GXhwPD0deGkCaU+SyJBpulW+TE29JsggyMvHmT1UjVXw34UnlyslBb/NPvAZstkvgvq+ohYKnz8nvw8tBaCKVZ3i8QPBXEI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753193219; c=relaxed/simple; bh=mon8TzNHLXQT6zZMNvX4vMAOvrBz13cVa0XmDe2JSsU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=QY50W9QjCoqBxQ7gENTqf8n/QzS1PfxjKX0PWlnne2psdLcOq7z+llFYvwWkJkKaDW8FMon2pZah7Ley1F/dD5y+Us50IUZ+mcBkFU15+1boHQ1e4mSWGcjGW3dIJsvi+jdNCjy+1CGqaNLLoEKoDSUajSTOYp7o60tWImLjdek= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=p3ucefz+; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="p3ucefz+" Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56ME4Fs4028578; Tue, 22 Jul 2025 16:06:44 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= m0xdNfz6LyNhNT7aB8b6n+LHAO+1A1pSYtRKBgMjwCw=; b=p3ucefz+gCqWme6q eZ+WFS0MrqsHZ0dl8Q3kLSxcb0bjYMat/Sof9qESE/waGAa8mA1Ob6Y5f5qez1dJ Zl/fUubJu+Uukf0WYTbYpkPfFBj0GXyVHaak5utrXq+IEisZL/U0aHKQlh/Uld+I xfDK5/Ppy/96IeyPXSDvO4hCjJGJJOhL41aiEViPirCQKH3hLr8N4mNscrZkBb70 TA0qCCF0LtIFgLyUpwAiXgmHENMP0RUU00WMZk1zN0C4vXYIJkJfJfTLVIAZPVtt JiFKAI/QfMvglauJF5M5xp014MDEnuJDkJZapOysQ9q/jDMPXr9XK6kZo+0j7ckn ncrYJw== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 480pamu7j9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 22 Jul 2025 16:06:44 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 23F7440050; Tue, 22 Jul 2025 16:05:15 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DCD417A31EE; Tue, 22 Jul 2025 16:03:56 +0200 (CEST) Received: from localhost (10.48.86.185) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 22 Jul 2025 16:03:56 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Tue, 22 Jul 2025 16:03:27 +0200 Subject: [PATCH v3 10/19] arm64: dts: st: add DDR channel to stm32mp257f-ev1 board Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250722-ddrperfm-upstream-v3-10-7b7a4f3dc8a0@foss.st.com> References: <20250722-ddrperfm-upstream-v3-0-7b7a4f3dc8a0@foss.st.com> In-Reply-To: <20250722-ddrperfm-upstream-v3-0-7b7a4f3dc8a0@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic , Julius Werner CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-8018a X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-22_02,2025-07-21_02,2025-03-28_01 Add 32bits DDR4 channel to the stm32mp257f-dk board. Signed-off-by: Clément Le Goffic --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index 2f561ad40665..cd2fe81bf934 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -41,6 +41,13 @@ pad_clk: pad-clk { }; }; + ddr_channel: ddr4-channel { + #address-cells = <1>; + #size-cells = <0>; + compatible = "jedec,ddr4-channel"; + io-width = <32>; + }; + imx335_2v9: regulator-2v9 { compatible = "regulator-fixed"; regulator-name = "imx335-avdd"; -- 2.43.0