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[2a00:1028:83b8:1e7a:3010:3bd6:8521:caf1]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4324eab2ebfsm73767887f8f.40.2025.12.31.06.02.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 31 Dec 2025 06:02:01 -0800 (PST) Date: Wed, 31 Dec 2025 15:01:59 +0100 From: Petr Tesarik To: "Michael S. Tsirkin" Cc: linux-kernel@vger.kernel.org, Cong Wang , Jonathan Corbet , Olivia Mackall , Herbert Xu , Jason Wang , Paolo Bonzini , Stefan Hajnoczi , Eugenio =?UTF-8?B?UMOpcmV6?= , "James E.J. Bottomley" , "Martin K. Petersen" , Gerd Hoffmann , Xuan Zhuo , Marek Szyprowski , Robin Murphy , Stefano Garzarella , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Leon Romanovsky , Jason Gunthorpe , linux-doc@vger.kernel.org, linux-crypto@vger.kernel.org, virtualization@lists.linux.dev, linux-scsi@vger.kernel.org, iommu@lists.linux.dev, kvm@vger.kernel.org, netdev@vger.kernel.org Subject: Re: [PATCH RFC 01/13] dma-mapping: add __dma_from_device_align_begin/end Message-ID: <20251231150159.1779b585@mordecai> In-Reply-To: References: X-Mailer: Claws Mail 4.3.1 (GTK 3.24.51; x86_64-suse-linux-gnu) Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Tue, 30 Dec 2025 05:15:46 -0500 "Michael S. Tsirkin" wrote: > When a structure contains a buffer that DMA writes to alongside fields > that the CPU writes to, cache line sharing between the DMA buffer and > CPU-written fields can cause data corruption on non-cache-coherent > platforms. > > Add __dma_from_device_aligned_begin/__dma_from_device_aligned_end > annotations to ensure proper alignment to prevent this: > > struct my_device { > spinlock_t lock1; > __dma_from_device_aligned_begin char dma_buffer1[16]; > char dma_buffer2[16]; > __dma_from_device_aligned_end spinlock_t lock2; > }; > > When the DMA buffer is the last field in the structure, just > __dma_from_device_aligned_begin is enough - the compiler's struct > padding protects the tail: > > struct my_device { > spinlock_t lock; > struct mutex mlock; > __dma_from_device_aligned_begin char dma_buffer1[16]; > char dma_buffer2[16]; > }; This works, but it's a bit hard to read. Can we reuse the __cacheline_group_{begin, end}() macros from ? Something like this: #define __dma_from_device_group_begin(GROUP) \ __cacheline_group_begin(GROUP) \ ____dma_from_device_aligned #define __dma_from_device_group_end(GROUP) \ __cacheline_group_end(GROUP) \ ____dma_from_device_aligned And used like this (the "rxbuf" group id was chosen arbitrarily): struct my_device { spinlock_t lock1; __dma_from_device_group_begin(rxbuf); char dma_buffer1[16]; char dma_buffer2[16]; __dma_from_device_group_end(rxbuf); spinlock_t lock2; }; Petr T > Signed-off-by: Michael S. Tsirkin > --- > include/linux/dma-mapping.h | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h > index aa36a0d1d9df..47b7de3786a1 100644 > --- a/include/linux/dma-mapping.h > +++ b/include/linux/dma-mapping.h > @@ -703,6 +703,16 @@ static inline int dma_get_cache_alignment(void) > } > #endif > > +#ifdef ARCH_HAS_DMA_MINALIGN > +#define ____dma_from_device_aligned __aligned(ARCH_DMA_MINALIGN) > +#else > +#define ____dma_from_device_aligned > +#endif > +/* Apply to the 1st field of the DMA buffer */ > +#define __dma_from_device_aligned_begin ____dma_from_device_aligned > +/* Apply to the 1st field beyond the DMA buffer */ > +#define __dma_from_device_aligned_end ____dma_from_device_aligned > + > static inline void *dmam_alloc_coherent(struct device *dev, size_t size, > dma_addr_t *dma_handle, gfp_t gfp) > {