From: Joel Fernandes <joelagnelf@nvidia.com>
To: linux-kernel@vger.kernel.org
Cc: "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Jonathan Corbet" <corbet@lwn.net>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Jani Nikula" <jani.nikula@linux.intel.com>,
"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Tvrtko Ursulin" <tursulin@ursulin.net>,
"Huang Rui" <ray.huang@amd.com>,
"Matthew Auld" <matthew.auld@intel.com>,
"Matthew Brost" <matthew.brost@intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Helge Deller" <deller@gmx.de>,
"Danilo Krummrich" <dakr@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
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"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
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"Alexandre Courbot" <acourbot@nvidia.com>,
"Andrea Righi" <arighi@nvidia.com>,
"Andy Ritger" <aritger@nvidia.com>, "Zhi Wang" <zhiw@nvidia.com>,
"Balbir Singh" <balbirs@nvidia.com>,
"Philipp Stanner" <phasta@kernel.org>,
"Elle Rhumsaa" <elle@weathered-steel.dev>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
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linux-fbdev@vger.kernel.org,
"Joel Fernandes" <joelagnelf@nvidia.com>,
"Nikola Djukic" <ndjukic@nvidia.com>
Subject: [PATCH v7 02/23] docs: gpu: nova-core: Document the PRAMIN aperture mechanism
Date: Wed, 18 Feb 2026 16:19:59 -0500 [thread overview]
Message-ID: <20260218212020.800836-3-joelagnelf@nvidia.com> (raw)
In-Reply-To: <20260218212020.800836-1-joelagnelf@nvidia.com>
Add documentation for the PRAMIN aperture mechanism used by nova-core
for direct VRAM access.
Nova only uses TARGET=VID_MEM for VRAM access. The SYS_MEM target values
are documented for completeness but not used by the driver.
Cc: Nikola Djukic <ndjukic@nvidia.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
---
Documentation/gpu/nova/core/pramin.rst | 125 +++++++++++++++++++++++++
Documentation/gpu/nova/index.rst | 1 +
2 files changed, 126 insertions(+)
create mode 100644 Documentation/gpu/nova/core/pramin.rst
diff --git a/Documentation/gpu/nova/core/pramin.rst b/Documentation/gpu/nova/core/pramin.rst
new file mode 100644
index 000000000000..55ec9d920629
--- /dev/null
+++ b/Documentation/gpu/nova/core/pramin.rst
@@ -0,0 +1,125 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+=========================
+PRAMIN aperture mechanism
+=========================
+
+.. note::
+ The following description is approximate and current as of the Ampere family.
+ It may change for future generations and is intended to assist in understanding
+ the driver code.
+
+Introduction
+============
+
+PRAMIN is a hardware aperture mechanism that provides CPU access to GPU Video RAM (VRAM) before
+the GPU's Memory Management Unit (MMU) and page tables are initialized. This 1MB sliding window,
+located at a fixed offset within BAR0, is essential for setting up page tables and other critical
+GPU data structures without relying on the GPU's MMU.
+
+Architecture Overview
+=====================
+
+The PRAMIN aperture mechanism is logically implemented by the GPU's PBUS (PCIe Bus Controller Unit)
+and provides a CPU-accessible window into VRAM through the PCIe interface::
+
+ +-----------------+ PCIe +------------------------------+
+ | CPU |<----------->| GPU |
+ +-----------------+ | |
+ | +----------------------+ |
+ | | PBUS | |
+ | | (Bus Controller) | |
+ | | | |
+ | | +--------------+<------------ (window starts at
+ | | | PRAMIN | | | BAR0 + 0x700000)
+ | | | Window | | |
+ | | | (1MB) | | |
+ | | +--------------+ | |
+ | | | | |
+ | +---------|------------+ |
+ | | |
+ | v |
+ | +----------------------+<------------ (Program PRAMIN to any
+ | | VRAM | | 64KB-aligned VRAM boundary)
+ | | (Several GBs) | |
+ | | | |
+ | | FB[0x000000000000] | |
+ | | ... | |
+ | | FB[0x7FFFFFFFFFF] | |
+ | +----------------------+ |
+ +------------------------------+
+
+PBUS (PCIe Bus Controller) is responsible for, among other things, handling MMIO
+accesses to the BAR registers.
+
+PRAMIN Window Operation
+=======================
+
+The PRAMIN window provides a 1MB sliding aperture that can be repositioned over
+the entire VRAM address space using the ``NV_PBUS_BAR0_WINDOW`` register.
+
+Window Control Mechanism
+-------------------------
+
+The window position is controlled via the PBUS ``BAR0_WINDOW`` register::
+
+ NV_PBUS_BAR0_WINDOW Register (0x1700):
+ +-------+--------+--------------------------------------+
+ | 31:26 | 25:24 | 23:0 |
+ | RSVD | TARGET | BASE_ADDR |
+ | | | (bits 39:16 of VRAM address) |
+ +-------+--------+--------------------------------------+
+
+ BASE_ADDR field (bits 23:0):
+ - Contains bits [39:16] of the target VRAM address
+ - Provides 40-bit (1TB) address space coverage
+ - Must be programmed with 64KB-aligned addresses
+
+ TARGET field (bits 25:24):
+ - 0x0: VRAM (Video Memory)
+ - 0x1: SYS_MEM_COH (Coherent System Memory)
+ - 0x2: SYS_MEM_NONCOH (Non-coherent System Memory)
+ - 0x3: Reserved
+
+ .. note::
+ Nova only uses TARGET=VRAM (0x0) for video memory access. The SYS_MEM
+ target values are documented here for hardware completeness but are
+ not used by the driver.
+
+64KB Alignment Requirement
+---------------------------
+
+The PRAMIN window must be aligned to 64KB boundaries in VRAM. This is enforced
+by the ``BASE_ADDR`` field representing bits [39:16] of the target address::
+
+ VRAM Address Calculation:
+ actual_vram_addr = (BASE_ADDR << 16) + pramin_offset
+ Where:
+ - BASE_ADDR: 24-bit value from NV_PBUS_BAR0_WINDOW[23:0]
+ - pramin_offset: 20-bit offset within the PRAMIN window [0x00000-0xFFFFF]
+
+ Example Window Positioning:
+ +---------------------------------------------------------+
+ | VRAM Space |
+ | |
+ | 0x000000000 +-----------------+ <-- 64KB aligned |
+ | | PRAMIN Window | |
+ | | (1MB) | |
+ | 0x0000FFFFF +-----------------+ |
+ | |
+ | | ^ |
+ | | | Window can slide |
+ | v | to any 64KB-aligned boundary |
+ | |
+ | 0x123400000 +-----------------+ <-- 64KB aligned |
+ | | PRAMIN Window | |
+ | | (1MB) | |
+ | 0x1234FFFFF +-----------------+ |
+ | |
+ | ... |
+ | |
+ | 0x7FFFF0000 +-----------------+ <-- 64KB aligned |
+ | | PRAMIN Window | |
+ | | (1MB) | |
+ | 0x7FFFFFFFF +-----------------+ |
+ +---------------------------------------------------------+
diff --git a/Documentation/gpu/nova/index.rst b/Documentation/gpu/nova/index.rst
index e39cb3163581..b8254b1ffe2a 100644
--- a/Documentation/gpu/nova/index.rst
+++ b/Documentation/gpu/nova/index.rst
@@ -32,3 +32,4 @@ vGPU manager VFIO driver and the nova-drm driver.
core/devinit
core/fwsec
core/falcon
+ core/pramin
--
2.34.1
next prev parent reply other threads:[~2026-02-18 21:21 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-18 21:19 [PATCH v7 00/23] nova-core: Add memory management support Joel Fernandes
2026-02-18 21:19 ` [PATCH v7 01/23] nova-core: mm: Add support to use PRAMIN windows to write to VRAM Joel Fernandes
2026-02-18 21:19 ` Joel Fernandes [this message]
2026-02-18 21:20 ` [PATCH v7 03/23] nova-core: Add BAR1 aperture type and size constant Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 04/23] nova-core: gsp: Add BAR1 PDE base accessors Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 05/23] nova-core: mm: Add common memory management types Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 06/23] nova-core: mm: Add common types for all page table formats Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 07/23] nova-core: mm: Add MMU v2 page table types Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 08/23] nova-core: mm: Add MMU v3 " Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 09/23] nova-core: mm: Add unified page table entry wrapper enums Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 10/23] nova-core: mm: Add TLB flush support Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 11/23] nova-core: mm: Add GpuMm centralized memory manager Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 12/23] nova-core: mm: Add page table walker for MMU v2/v3 Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 13/23] nova-core: mm: Add Virtual Memory Manager Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 14/23] nova-core: mm: Add virtual address range tracking to VMM Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 15/23] nova-core: mm: Add multi-page mapping API " Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 16/23] nova-core: mm: Add BAR1 user interface Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 17/23] nova-core: gsp: Return GspStaticInfo and FbLayout from boot() Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 18/23] nova-core: mm: Add BAR1 memory management self-tests Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 19/23] nova-core: mm: Add PRAMIN aperture self-tests Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 20/23] nova-core: gsp: Extract usable FB region from GSP Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 21/23] nova-core: fb: Add usable_vram field to FbLayout Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 22/23] nova-core: mm: Use usable VRAM region for buddy allocator Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 23/23] nova-core: mm: Add BarUser to struct Gpu and create at boot Joel Fernandes
2026-02-19 15:20 ` [PATCH v7 00/23] nova-core: Add memory management support Alexandre Courbot
2026-02-19 19:48 ` Joel Fernandes
2026-02-20 1:54 ` Alexandre Courbot
2026-02-20 3:25 ` Alexandre Courbot
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