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From: Joel Fernandes <joelagnelf@nvidia.com>
To: linux-kernel@vger.kernel.org
Cc: "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
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	intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	linux-fbdev@vger.kernel.org,
	"Joel Fernandes" <joelagnelf@nvidia.com>,
	"Nikola Djukic" <ndjukic@nvidia.com>
Subject: [PATCH v7 05/23] nova-core: mm: Add common memory management types
Date: Wed, 18 Feb 2026 16:20:02 -0500	[thread overview]
Message-ID: <20260218212020.800836-6-joelagnelf@nvidia.com> (raw)
In-Reply-To: <20260218212020.800836-1-joelagnelf@nvidia.com>

Add foundational types for GPU memory management. These types are used
throughout the nova memory management subsystem for page table
operations, address translation, and memory allocation.

Cc: Nikola Djukic <ndjukic@nvidia.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
---
 drivers/gpu/nova-core/mm/mod.rs | 171 ++++++++++++++++++++++++++++++++
 1 file changed, 171 insertions(+)

diff --git a/drivers/gpu/nova-core/mm/mod.rs b/drivers/gpu/nova-core/mm/mod.rs
index 7a5dd4220c67..04d9baa7220e 100644
--- a/drivers/gpu/nova-core/mm/mod.rs
+++ b/drivers/gpu/nova-core/mm/mod.rs
@@ -2,4 +2,175 @@
 
 //! Memory management subsystems for nova-core.
 
+#![expect(dead_code)]
+
 pub(crate) mod pramin;
+
+use kernel::sizes::SZ_4K;
+
+/// Page size in bytes (4 KiB).
+pub(crate) const PAGE_SIZE: usize = SZ_4K;
+
+bitfield! {
+    pub(crate) struct VramAddress(u64), "Physical VRAM address in GPU video memory" {
+        11:0    offset          as u64, "Offset within 4KB page";
+        63:12   frame_number    as u64 => Pfn, "Physical frame number";
+    }
+}
+
+impl VramAddress {
+    /// Create a new VRAM address from a raw value.
+    pub(crate) const fn new(addr: u64) -> Self {
+        Self(addr)
+    }
+
+    /// Get the raw address value as `usize` (useful for MMIO offsets).
+    pub(crate) const fn raw(&self) -> usize {
+        self.0 as usize
+    }
+
+    /// Get the raw address value as `u64`.
+    pub(crate) const fn raw_u64(&self) -> u64 {
+        self.0
+    }
+}
+
+impl PartialEq for VramAddress {
+    fn eq(&self, other: &Self) -> bool {
+        self.0 == other.0
+    }
+}
+
+impl Eq for VramAddress {}
+
+impl PartialOrd for VramAddress {
+    fn partial_cmp(&self, other: &Self) -> Option<core::cmp::Ordering> {
+        Some(self.cmp(other))
+    }
+}
+
+impl Ord for VramAddress {
+    fn cmp(&self, other: &Self) -> core::cmp::Ordering {
+        self.0.cmp(&other.0)
+    }
+}
+
+impl From<Pfn> for VramAddress {
+    fn from(pfn: Pfn) -> Self {
+        Self::default().set_frame_number(pfn)
+    }
+}
+
+bitfield! {
+    pub(crate) struct VirtualAddress(u64), "Virtual address in GPU address space" {
+        11:0    offset          as u64, "Offset within 4KB page";
+        20:12   l4_index        as u64, "Level 4 index (PTE)";
+        29:21   l3_index        as u64, "Level 3 index (Dual PDE)";
+        38:30   l2_index        as u64, "Level 2 index";
+        47:39   l1_index        as u64, "Level 1 index";
+        56:48   l0_index        as u64, "Level 0 index (PDB)";
+        63:12   frame_number    as u64 => Vfn, "Virtual frame number";
+    }
+}
+
+impl VirtualAddress {
+    /// Create a new virtual address from a raw value.
+    #[expect(dead_code)]
+    pub(crate) const fn new(addr: u64) -> Self {
+        Self(addr)
+    }
+
+    /// Get the page table index for a given level (0-5).
+    pub(crate) fn level_index(&self, level: u64) -> u64 {
+        match level {
+            0 => self.l0_index(),
+            1 => self.l1_index(),
+            2 => self.l2_index(),
+            3 => self.l3_index(),
+            4 => self.l4_index(),
+            // L5 is only used by MMU v3 (PTE level).
+            5 => self.l4_index(),
+            _ => 0,
+        }
+    }
+}
+
+impl From<Vfn> for VirtualAddress {
+    fn from(vfn: Vfn) -> Self {
+        Self::default().set_frame_number(vfn)
+    }
+}
+
+/// Physical Frame Number.
+///
+/// Represents a physical page in VRAM.
+#[repr(transparent)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq, Default)]
+pub(crate) struct Pfn(u64);
+
+impl Pfn {
+    /// Create a new PFN from a frame number.
+    pub(crate) const fn new(frame_number: u64) -> Self {
+        Self(frame_number)
+    }
+
+    /// Get the raw frame number.
+    pub(crate) const fn raw(self) -> u64 {
+        self.0
+    }
+}
+
+impl From<VramAddress> for Pfn {
+    fn from(addr: VramAddress) -> Self {
+        addr.frame_number()
+    }
+}
+
+impl From<u64> for Pfn {
+    fn from(val: u64) -> Self {
+        Self(val)
+    }
+}
+
+impl From<Pfn> for u64 {
+    fn from(pfn: Pfn) -> Self {
+        pfn.0
+    }
+}
+
+/// Virtual Frame Number.
+///
+/// Represents a virtual page in GPU address space.
+#[repr(transparent)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq, Default)]
+pub(crate) struct Vfn(u64);
+
+impl Vfn {
+    /// Create a new VFN from a frame number.
+    pub(crate) const fn new(frame_number: u64) -> Self {
+        Self(frame_number)
+    }
+
+    /// Get the raw frame number.
+    pub(crate) const fn raw(self) -> u64 {
+        self.0
+    }
+}
+
+impl From<VirtualAddress> for Vfn {
+    fn from(addr: VirtualAddress) -> Self {
+        addr.frame_number()
+    }
+}
+
+impl From<u64> for Vfn {
+    fn from(val: u64) -> Self {
+        Self(val)
+    }
+}
+
+impl From<Vfn> for u64 {
+    fn from(vfn: Vfn) -> Self {
+        vfn.0
+    }
+}
-- 
2.34.1


  parent reply	other threads:[~2026-02-18 21:21 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-18 21:19 [PATCH v7 00/23] nova-core: Add memory management support Joel Fernandes
2026-02-18 21:19 ` [PATCH v7 01/23] nova-core: mm: Add support to use PRAMIN windows to write to VRAM Joel Fernandes
2026-02-18 21:19 ` [PATCH v7 02/23] docs: gpu: nova-core: Document the PRAMIN aperture mechanism Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 03/23] nova-core: Add BAR1 aperture type and size constant Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 04/23] nova-core: gsp: Add BAR1 PDE base accessors Joel Fernandes
2026-02-18 21:20 ` Joel Fernandes [this message]
2026-02-18 21:20 ` [PATCH v7 06/23] nova-core: mm: Add common types for all page table formats Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 07/23] nova-core: mm: Add MMU v2 page table types Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 08/23] nova-core: mm: Add MMU v3 " Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 09/23] nova-core: mm: Add unified page table entry wrapper enums Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 10/23] nova-core: mm: Add TLB flush support Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 11/23] nova-core: mm: Add GpuMm centralized memory manager Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 12/23] nova-core: mm: Add page table walker for MMU v2/v3 Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 13/23] nova-core: mm: Add Virtual Memory Manager Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 14/23] nova-core: mm: Add virtual address range tracking to VMM Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 15/23] nova-core: mm: Add multi-page mapping API " Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 16/23] nova-core: mm: Add BAR1 user interface Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 17/23] nova-core: gsp: Return GspStaticInfo and FbLayout from boot() Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 18/23] nova-core: mm: Add BAR1 memory management self-tests Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 19/23] nova-core: mm: Add PRAMIN aperture self-tests Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 20/23] nova-core: gsp: Extract usable FB region from GSP Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 21/23] nova-core: fb: Add usable_vram field to FbLayout Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 22/23] nova-core: mm: Use usable VRAM region for buddy allocator Joel Fernandes
2026-02-18 21:20 ` [PATCH v7 23/23] nova-core: mm: Add BarUser to struct Gpu and create at boot Joel Fernandes
2026-02-19 15:20 ` [PATCH v7 00/23] nova-core: Add memory management support Alexandre Courbot
2026-02-19 19:48   ` Joel Fernandes
2026-02-20  1:54     ` Alexandre Courbot
2026-02-20  3:25     ` Alexandre Courbot

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