From: Jonathan Cameron <jic23@kernel.org>
To: Ammar Mustafa <ammarmustafa34@gmail.com>
Cc: "Andy Shevchenko" <andriy.shevchenko@intel.com>,
"Alisa-Dariana Roman" <alisa.roman@analog.com>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <skhan@linuxfoundation.org>,
linux-iio@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] Docs: iio: ad7191 Correct clock configuration
Date: Fri, 27 Mar 2026 07:31:56 +0000 [thread overview]
Message-ID: <20260327073156.522120fc@jic23-huawei> (raw)
In-Reply-To: <acWthfEL_HGtVykN@TARS>
On Thu, 26 Mar 2026 18:04:53 -0400
Ammar Mustafa <ammarmustafa34@gmail.com> wrote:
> On Sun, Mar 22, 2026 at 12:13:14PM +0000, Jonathan Cameron wrote:
> > On Sat, 28 Feb 2026 12:50:46 +0200
> > Andy Shevchenko <andriy.shevchenko@intel.com> wrote:
> >
> > > On Fri, Feb 27, 2026 at 02:08:33PM -0500, Ammar Mustafa wrote:
> > > > Correct the ad7191 documentation to match the datasheet:
> > > > - Fix inverted CLKSEL pin logic: device uses external clock when pin is
> > > > inactive, and internal CMOS/crystal when high.
> > >
> > > high --> active
> > >
> > > Thanks, this part looks good in the below documentation update.
> > >
> > > > - Correct CMOS-compatible clock pin from MCLK2 to MCLK1.
> > >
> > > I haven't checked driver yet, but is it only for a single component?
> > > Can you double check that _all_ supported by the driver have the same
> > > in their datasheet(s)?
> > >
> > > ...
> >
> > Hi Ammar,
> >
> > Just a quick note to say I'm going to mark this one in patchwork
> > as needing a new version given Andy's questions have been here a while.
> >
> > Thanks,
> >
> > Jonathan
> >
> > >
> > > > +- When CLKSEL pin is ACTIVE: Uses internal 4.92MHz clock (no clock property
> > > > needed)
> > > > -- When CLKSEL pin is tied HIGH: Requires external clock source
> > > > +- When CLKSEL pin is INACTIVE: Requires external clock source
> > > > - Can be a crystal between MCLK1 and MCLK2 pins
> > > > - - Or a CMOS-compatible clock driving MCLK2 pin
> > > > + - Or a CMOS-compatible clock driving MCLK1 pin and MCLK2 left unconnected
> > > > - Must specify the "clocks" property in device tree when using external clock
> > >
> >
>
> Hi Jonathon,
>
> I replied to Andy's questionm not sure if I can attach it in mutt for you,
> but we found that this driver only supports the AD7191 so no other
> documentation needs to be updated or check for this issue.
> Let me know if I need to do anything else to have this patch merged.
>
Given it's docs, I'll a sneak it in (not so worried if this one gets
build time in linux-next). Applied.
Thanks,
Jonathan
> Thank you,
>
> Ammar Mustafa
prev parent reply other threads:[~2026-03-27 7:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-27 19:08 [PATCH v2] Docs: iio: ad7191 Correct clock configuration Ammar Mustafa
2026-02-28 10:50 ` Andy Shevchenko
2026-03-22 12:13 ` Jonathan Cameron
2026-03-26 22:04 ` Ammar Mustafa
2026-03-27 7:31 ` Jonathan Cameron [this message]
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