From: fangyu.yu@linux.alibaba.com
To: anup@brainfault.org
Cc: alex@ghiti.fr, andrew.jones@oss.qualcomm.com,
aou@eecs.berkeley.edu, atish.patra@linux.dev, corbet@lwn.net,
fangyu.yu@linux.alibaba.com, guoren@kernel.org,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, palmer@dabbelt.com,
pbonzini@redhat.com, pjw@kernel.org,
radim.krcmar@oss.qualcomm.com, skhan@linuxfoundation.org
Subject: Re: Re: [PATCH v6 3/4] RISC-V: KVM: Detect and expose supported HGATP G-stage modes
Date: Thu, 2 Apr 2026 09:30:10 +0800 [thread overview]
Message-ID: <20260402013010.9030-1-fangyu.yu@linux.alibaba.com> (raw)
In-Reply-To: <CAAhSdy0ri8sWZn0CsCpfSgNqXw5gEesfKxcKqc56azVOrqz86w@mail.gmail.com>
>>
>> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>
>> Extend kvm_riscv_gstage_mode_detect() to probe all HGATP.MODE values
>> supported by the host and record them in a bitmask. Keep tracking the
>> maximum supported G-stage page table level for existing internal users.
>>
>> Also provide lightweight helpers to retrieve the supported-mode bitmask
>> and validate a requested HGATP.MODE against it.
>>
>> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>> Reviewed-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
>> ---
>> arch/riscv/include/asm/kvm_gstage.h | 11 ++++++++
>> arch/riscv/kvm/gstage.c | 43 +++++++++++++++--------------
>> 2 files changed, 34 insertions(+), 20 deletions(-)
>>
>> diff --git a/arch/riscv/include/asm/kvm_gstage.h b/arch/riscv/include/asm/kvm_gstage.h
>> index 70d9d483365e..bbf8f45c6563 100644
>> --- a/arch/riscv/include/asm/kvm_gstage.h
>> +++ b/arch/riscv/include/asm/kvm_gstage.h
>> @@ -31,6 +31,7 @@ struct kvm_gstage_mapping {
>> #endif
>>
>> extern unsigned long kvm_riscv_gstage_max_pgd_levels;
>> +extern u32 kvm_riscv_gstage_supported_mode_mask;
>>
>> #define kvm_riscv_gstage_pgd_xbits 2
>> #define kvm_riscv_gstage_pgd_size (1UL << (HGATP_PAGE_SHIFT + kvm_riscv_gstage_pgd_xbits))
>> @@ -102,4 +103,14 @@ static inline void kvm_riscv_gstage_init(struct kvm_gstage *gstage, struct kvm *
>> gstage->pgd_levels = kvm->arch.pgd_levels;
>> }
>>
>> +static inline u32 kvm_riscv_get_hgatp_mode_mask(void)
>> +{
>> + return kvm_riscv_gstage_supported_mode_mask;
>> +}
>> +
>> +static inline bool kvm_riscv_hgatp_mode_is_valid(unsigned long mode)
>> +{
>> + return kvm_riscv_gstage_supported_mode_mask & BIT(mode);
>> +}
>> +
>> #endif
>> diff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c
>> index 7c4c34bc191b..459041255c14 100644
>> --- a/arch/riscv/kvm/gstage.c
>> +++ b/arch/riscv/kvm/gstage.c
>> @@ -16,6 +16,8 @@ unsigned long kvm_riscv_gstage_max_pgd_levels __ro_after_init = 3;
>> #else
>> unsigned long kvm_riscv_gstage_max_pgd_levels __ro_after_init = 2;
>> #endif
>> +/* Bitmask of supported HGATP.MODE encodings (BIT(HGATP_MODE_*)). */
>> +u32 kvm_riscv_gstage_supported_mode_mask __ro_after_init;
>>
>> #define gstage_pte_leaf(__ptep) \
>> (pte_val(*(__ptep)) & (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC))
>> @@ -315,42 +317,43 @@ void kvm_riscv_gstage_wp_range(struct kvm_gstage *gstage, gpa_t start, gpa_t end
>> }
>> }
>>
>> +static bool __init kvm_riscv_hgatp_mode_supported(unsigned long mode)
>> +{
>> + csr_write(CSR_HGATP, mode << HGATP_MODE_SHIFT);
>> + return ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == mode);
>> +}
>> +
>> void __init kvm_riscv_gstage_mode_detect(void)
>> {
>> + kvm_riscv_gstage_supported_mode_mask = 0;
>> + kvm_riscv_gstage_max_pgd_levels = 0;
>> +
>> #ifdef CONFIG_64BIT
>> - /* Try Sv57x4 G-stage mode */
>> - csr_write(CSR_HGATP, HGATP_MODE_SV57X4 << HGATP_MODE_SHIFT);
>> - if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV57X4) {
>> - kvm_riscv_gstage_max_pgd_levels = 5;
>> - goto done;
>> + /* Try Sv39x4 G-stage mode */
>> + if (kvm_riscv_hgatp_mode_supported(HGATP_MODE_SV39X4)) {
>> + kvm_riscv_gstage_supported_mode_mask |= BIT(HGATP_MODE_SV39X4);
>> + kvm_riscv_gstage_max_pgd_levels = 3;
>> }
>>
>> /* Try Sv48x4 G-stage mode */
>> - csr_write(CSR_HGATP, HGATP_MODE_SV48X4 << HGATP_MODE_SHIFT);
>> - if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV48X4) {
>> + if (kvm_riscv_hgatp_mode_supported(HGATP_MODE_SV48X4)) {
>> + kvm_riscv_gstage_supported_mode_mask |= BIT(HGATP_MODE_SV48X4);
>> kvm_riscv_gstage_max_pgd_levels = 4;
>> - goto done;
>
>Keep the original approach until then NACK to this series.
>
Hi Anup,
Thanks for the review.
Ack. I’ll keep the original HGATP mode probing logic for now and send a v7 accordingly.
Thanks,
Fangyu
>Regards,
>Anup
>
>> }
>>
>> - /* Try Sv39x4 G-stage mode */
>> - csr_write(CSR_HGATP, HGATP_MODE_SV39X4 << HGATP_MODE_SHIFT);
>> - if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV39X4) {
>> - kvm_riscv_gstage_max_pgd_levels = 3;
>> - goto done;
>> + /* Try Sv57x4 G-stage mode */
>> + if (kvm_riscv_hgatp_mode_supported(HGATP_MODE_SV57X4)) {
>> + kvm_riscv_gstage_supported_mode_mask |= BIT(HGATP_MODE_SV57X4);
>> + kvm_riscv_gstage_max_pgd_levels = 5;
>> }
>> #else /* CONFIG_32BIT */
>> /* Try Sv32x4 G-stage mode */
>> - csr_write(CSR_HGATP, HGATP_MODE_SV32X4 << HGATP_MODE_SHIFT);
>> - if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV32X4) {
>> + if (kvm_riscv_hgatp_mode_supported(HGATP_MODE_SV32X4)) {
>> + kvm_riscv_gstage_supported_mode_mask |= BIT(HGATP_MODE_SV32X4);
>> kvm_riscv_gstage_max_pgd_levels = 2;
>> - goto done;
>> }
>> #endif
>>
>> - /* KVM depends on !HGATP_MODE_OFF */
>> - kvm_riscv_gstage_max_pgd_levels = 0;
>> -
>> -done:
>> csr_write(CSR_HGATP, 0);
>> kvm_riscv_local_hfence_gvma_all();
>> }
>> --
>> 2.50.1
>>
next prev parent reply other threads:[~2026-04-02 1:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 12:25 [PATCH v6 0/4] Support runtime configuration for per-VM's HGATP mode fangyu.yu
2026-03-30 12:25 ` [PATCH v6 1/4] RISC-V: KVM: " fangyu.yu
2026-03-30 13:20 ` Guo Ren
2026-04-01 16:02 ` Anup Patel
2026-03-30 12:25 ` [PATCH v6 2/4] RISC-V: KVM: Cache gstage pgd_levels in struct kvm_gstage fangyu.yu
2026-04-01 16:03 ` Anup Patel
2026-03-30 12:26 ` [PATCH v6 3/4] RISC-V: KVM: Detect and expose supported HGATP G-stage modes fangyu.yu
2026-03-30 13:21 ` Guo Ren
2026-04-01 16:05 ` Anup Patel
2026-04-02 1:30 ` fangyu.yu [this message]
2026-03-30 12:26 ` [PATCH v6 4/4] RISC-V: KVM: add KVM_CAP_RISCV_SET_HGATP_MODE fangyu.yu
2026-03-30 13:20 ` Guo Ren
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260402013010.9030-1-fangyu.yu@linux.alibaba.com \
--to=fangyu.yu@linux.alibaba.com \
--cc=alex@ghiti.fr \
--cc=andrew.jones@oss.qualcomm.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atish.patra@linux.dev \
--cc=corbet@lwn.net \
--cc=guoren@kernel.org \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=pbonzini@redhat.com \
--cc=pjw@kernel.org \
--cc=radim.krcmar@oss.qualcomm.com \
--cc=skhan@linuxfoundation.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox