From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68A2935E956; Tue, 14 Apr 2026 07:07:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776150442; cv=none; b=hlXJjwc2DCXthQfSnngB9QZyRpwMCeGP+bq8lZ5PvQLVGpTRht0h/y5+Ng7c9OcLIoCCpSVC3FmuumqosGFJk/gpkCMhgNndl7sZrgJNziJAnz1inEx6cXhQLXE8KLsuvtK6A8EoOoNs4g6wdjCY12lwHgrCjl8FxcmWlID4Xac= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776150442; c=relaxed/simple; bh=YsdvlQqeVior0g/k+WAElPcnRGxse6gI8p2joQTg8Fc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=rJC0DzCBip2KX0dk3hJje0tFhnRoN1+lcKeMN3i9tbcN7zhJ/PxD2o7FCDDF0MeVbRrNrKf5pfXLTegzO1YlU3fmcbc9N1WcorjnIyCnsKKWSOxCM3Ub7EOCRTORpcLwMpMIw1g7cYTpRP5dH5bPR2lI8SibR8yB9ln1o21NcTk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=PovEGdae; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="PovEGdae" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1776150440; x=1807686440; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=YsdvlQqeVior0g/k+WAElPcnRGxse6gI8p2joQTg8Fc=; b=PovEGdae8yNB/AX6euDry4JoYMxrWZxXzWQoydG3w9Fo3DkpObX9cW11 LhogVTP9YqI5XKURzMV02suRkYUbou9mx8ijnZDxWuPAAikWmj1q/ZBdM XOllFPlhSCogrn/MVT6MzKcbdHy+y8lXhJIuhvPWJve2OwyI7p8CMemuO 9SK1DEOMHe8ubqjXs/550mf+1MuE+mc4LD/ObxDC2oA95IsI6dQVcIo81 6XJpVQg6MCkB5YYU1QcF4Q8f/V+NUQppeef4E6j8lUunybJcaYE1nPQX8 +3S98Jh/pUZXctD5T5iV4bsaKNTs6kN/XTN8yoW6pEakgv255dpFetnBD Q==; X-CSE-ConnectionGUID: rFHTN/mrSRa0XFt8ZVzD0A== X-CSE-MsgGUID: eFYd2JKhRuaLPIihMKletg== X-IronPort-AV: E=McAfee;i="6800,10657,11758"; a="99742708" X-IronPort-AV: E=Sophos;i="6.23,179,1770624000"; d="scan'208";a="99742708" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2026 00:06:49 -0700 X-CSE-ConnectionGUID: Qqv0CU4hSmi1Ya0DhafpcQ== X-CSE-MsgGUID: ld6HPmOxQI28P4mVvbJYIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,179,1770624000"; d="scan'208";a="231744909" Received: from guptapa-desk.jf.intel.com (HELO desk) ([10.165.239.46]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2026 00:06:49 -0700 Date: Tue, 14 Apr 2026 00:06:48 -0700 From: Pawan Gupta To: x86@kernel.org, Jon Kohler , Nikolay Borisov , "H. Peter Anvin" , Josh Poimboeuf , David Kaplan , Sean Christopherson , Borislav Petkov , Dave Hansen , Peter Zijlstra , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , KP Singh , Jiri Olsa , "David S. Miller" , David Laight , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , David Ahern , Martin KaFai Lau , Eduard Zingerman , Song Liu , Yonghong Song , John Fastabend , Stanislav Fomichev , Hao Luo , Paolo Bonzini , Jonathan Corbet Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Asit Mallick , Tao Zhang , bpf@vger.kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH v10 06/12] x86/vmscape: Use write_ibpb() instead of indirect_branch_prediction_barrier() Message-ID: <20260414-vmscape-bhb-v10-6-efa924abae5f@linux.intel.com> X-Mailer: b4 0.16-dev References: <20260414-vmscape-bhb-v10-0-efa924abae5f@linux.intel.com> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260414-vmscape-bhb-v10-0-efa924abae5f@linux.intel.com> indirect_branch_prediction_barrier() is a wrapper to write_ibpb(), which also checks if the CPU supports IBPB. For VMSCAPE, call to indirect_branch_prediction_barrier() is only possible when CPU supports IBPB. Simply call write_ibpb() directly to avoid unnecessary alternative patching. Suggested-by: Dave Hansen Tested-by: Jon Kohler Reviewed-by: Nikolay Borisov Signed-off-by: Pawan Gupta --- arch/x86/include/asm/entry-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/entry-common.h b/arch/x86/include/asm/entry-common.h index c45858db16c9..78b143673ca7 100644 --- a/arch/x86/include/asm/entry-common.h +++ b/arch/x86/include/asm/entry-common.h @@ -97,7 +97,7 @@ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs, /* Avoid unnecessary reads of 'x86_predictor_flush_exit_to_user' */ if (cpu_feature_enabled(X86_FEATURE_IBPB_EXIT_TO_USER) && this_cpu_read(x86_predictor_flush_exit_to_user)) { - indirect_branch_prediction_barrier(); + write_ibpb(); this_cpu_write(x86_predictor_flush_exit_to_user, false); } } -- 2.34.1