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a=openpgp; fpr=4F9C2C8728019633893EBBB98CB81F9A72BBA155 Signed-off-by: Stefan Dösinger --- Changes since v4: * Declare all uarts * Remove the UART aliases for now. I can revisit this when I get my hands on a board that exposes two UARTs. --- arch/arm/boot/dts/zte/zx297520v3-dlink-dwr932m.dts | 4 +++ arch/arm/boot/dts/zte/zx297520v3.dtsi | 39 ++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/arch/arm/boot/dts/zte/zx297520v3-dlink-dwr932m.dts b/arch/arm/boot/dts/zte/zx297520v3-dlink-dwr932m.dts index ac20215fddef..1700f46aba86 100644 --- a/arch/arm/boot/dts/zte/zx297520v3-dlink-dwr932m.dts +++ b/arch/arm/boot/dts/zte/zx297520v3-dlink-dwr932m.dts @@ -16,3 +16,7 @@ memory@20000000 { reg = <0x20000000 0x04000000>; }; }; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/zte/zx297520v3.dtsi b/arch/arm/boot/dts/zte/zx297520v3.dtsi index 903050c684cb..ca65797ed926 100644 --- a/arch/arm/boot/dts/zte/zx297520v3.dtsi +++ b/arch/arm/boot/dts/zte/zx297520v3.dtsi @@ -20,6 +20,15 @@ cpu@0 { }; }; + /* Base bus clock and default for the UART. It will be replaced once a clock driver has + * been added. + */ + uartclk: uartclk: uartclk-26000000 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <26000000>; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -60,5 +69,35 @@ gic: interrupt-controller@f2000000 { reg = <0xf2000000 0x10000>, <0xf2040000 0x20000>; }; + + uart0: serial@131000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0018c011>; + reg = <0x00131000 0x1000>; + interrupts = ; + clocks = <&uartclk>, <&uartclk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + + uart1: serial@1408000 { + compatible = "arm,pl011", "arm,primecell"; + arm,primecell-periphid = <0x0018c011>; + reg = <0x01408000 0x1000>; + interrupts = ; + clocks = <&uartclk>, <&uartclk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + + uart2: serial@140d000 { + compatible = "arm,primecell"; + arm,primecell-periphid = <0x0018c011>; + reg = <0x0140d000 0x1000>; + interrupts = ; + clocks = <&uartclk>, <&uartclk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; }; }; -- 2.53.0