From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 865CB23EA84; Sun, 24 May 2026 20:49:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779655766; cv=none; b=ngO0TAlJu2Fzo4Kml9To+SKp+i9Sve7DJgd8tFoH3GzFxMYHFv36iRaOY3GwPZVM0VjFCykdnQvIeAJ3RQJyANN/qRawPlrbqcYFkF1uLBnYdLwRlRXPE/n3ioE8CyKcHKiahOMEz42pYv51A/aE8vWP01HrC7XdAbf56zUQw9M= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779655766; c=relaxed/simple; bh=Xz39HGPIj1XGcn93mkn7Xwcg+K/3bMCE3fSU0yP2wos=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=d4GRcfO05Xl4FLzMGHBJzqFQlBMh1lUcAT2wPKS6fFjOM2+CWQvFVMyAwg7Y3Gsqxsm/D4GQhi6WR6DF7TdqkKdGA9LRPhau8jYrW4GrYfZcFVzjsLP+dATVGfRdJkWqEAbEvSY2jpPReLbzNsEuAveDK7BfKN9s97GSwT6I6d4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=P1TUsjwI; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="P1TUsjwI" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5EE921F000E9; Sun, 24 May 2026 20:49:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779655765; bh=SvFC+azNSDIKH1JXxHAf/KqgxPmhn9ag8hvuKL1foNs=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=P1TUsjwIBYKCMnwkSwDiyEF5pn3BuYlptPZEjNPwbze+umSA1x7/1EpW/DxDNxdxN hWN3I4mEaRTvJwdDA89F077EbnmLYC4ffFITQZqT56xYldvGs1QuqpB/TeJ8IbhKJb TsfkBslAS6whFYIRgXMrIYCGaVbwcq2RHndOqmLP0r7Eu5jcaG6pMPP3sM6iAmfxCL G6ORx4yMPBU5jAesSFupJmILzCBZMyt0G42wJ6Hp5AQDED4c98frirIZahAsiKjT+Z YXkR7WIsVKO5I9sztPCBXTUOkpbi/qV66DKHN6gnXNC5bOqR0dcz5nEjJZjFaxlU57 GM7Z4bf2Bl1sg== Date: Sun, 24 May 2026 15:49:21 -0500 From: Eric Biggers To: Bartosz Golaszewski Cc: Vinod Koul , Jonathan Corbet , Thara Gopinath , Herbert Xu , "David S. Miller" , Udit Tiwari , Md Sadre Alam , Dmitry Baryshkov , Manivannan Sadhasivam , Stephan Gerhold , Bjorn Andersson , Peter Ujfalusi , Michal Simek , Frank Li , Andy Gross , Neil Armstrong , dmaengine@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org, brgl@kernel.org, Bartosz Golaszewski , Dmitry Baryshkov , Konrad Dybcio Subject: Re: [PATCH v18 00/14] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Message-ID: <20260524204921.GC110177@quark> References: <20260522-qcom-qce-cmd-descr-v18-0-99103926bafc@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260522-qcom-qce-cmd-descr-v18-0-99103926bafc@oss.qualcomm.com> On Fri, May 22, 2026 at 03:39:53PM +0200, Bartosz Golaszewski wrote: > Currently the QCE crypto driver accesses the crypto engine registers > directly via CPU. Trust Zone may perform crypto operations simultaneously > resulting in a race condition. So this driver is just critically broken currently? Yet it's still not marked as BROKEN? What are we even doing? - Eric