From: Conor Dooley <conor@kernel.org>
To: ciprian.regus@analog.com
Cc: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Simon Horman <horms@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
Shuah Khan <skhan@linuxfoundation.org>,
Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH net-next v2 01/10] dt-bindings: net: Add ADIN1140
Date: Wed, 27 May 2026 16:11:36 +0100 [thread overview]
Message-ID: <20260527-nearness-antacid-9f94a3f43abc@spud> (raw)
In-Reply-To: <20260527-adin1140-driver-v2-1-37e5c8d4e0a0@analog.com>
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On Wed, May 27, 2026 at 12:51:46AM +0300, Ciprian Regus via B4 Relay wrote:
> From: Ciprian Regus <ciprian.regus@analog.com>
>
> The ADIN1140 is a single port 10BASE-T1S Ethernet controller that
> includes both the MAC and a PHY in the same package.
>
> Signed-off-by: Ciprian Regus <ciprian.regus@analog.com>
>
> ---
> v2 changelog:
> - Reorder the compatible entries in the dt schema (ad3306, adin1140).
> - Removed "dt-bindings" from the commit title and message.
> - Updated the DT example to use IRQ_TYPE_LEVEL_LOW instead of
> IRQ_TYPE_EDGE_FALLING for the interrupt trigger condition.
> - "implements" -> "tries to implement" in the description.
> - Removed the MAINTAINERS entry, as it will be added in a later patch
> in the series.
> - Reordered as the first patch of the series
> ---
> .../devicetree/bindings/net/adi,adin1140.yaml | 69 ++++++++++++++++++++++
> 1 file changed, 69 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/adi,adin1140.yaml b/Documentation/devicetree/bindings/net/adi,adin1140.yaml
> new file mode 100644
> index 000000000000..518ff6b36c46
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/adi,adin1140.yaml
> @@ -0,0 +1,69 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/adi,adin1140.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ADI ADIN1140 10BASE-T1S MAC-PHY
> +
> +maintainers:
> + - Ciprian Regus <ciprian.regus@analog.com>
> +
> +description: |
> + The ADIN1140 (also called AD3306) is a low power single port
Can you explain what is going on here please?
Is "adin1140" (which I can find no information easily online for) the
exact same device as the ad3306 (which has an entry on your site)?
> + 10BASE-T1S MAC-PHY. It integrates an Ethernet PHY with a MAC
> + and all the associated analog circuitry.
> + The device tries to implement the Open Alliance TC6 10BASE-T1x MAC-PHY
> + Serial Interface specification and is compliant with the
> + IEEE 802.3cg-2019 Ethernet standard for 10 Mbps single pair
> + Ethernet (SPE). The device has a 4-wire SPI interface for
> + communication between the MAC and host processor.
> +
> +allOf:
> + - $ref: /schemas/net/ethernet-controller.yaml#
> + - $ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - adi,ad3306
> + - adi,adin1140
Because if they are really two names for the same part, this compatible
setup makes no sense, as it means they have a different programming
models.
Thanks,
Conor.
> +
> + reg:
> + maxItems: 1
> +
> + spi-max-frequency:
> + maximum: 25000000
> +
> + interrupts:
> + maxItems: 1
> + description: Interrupt from the MAC-PHY for receive data available
> + and error conditions
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - spi-max-frequency
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethernet@0 {
> + compatible = "adi,adin1140";
> + reg = <0>;
> + spi-max-frequency = <23000000>;
> +
> + interrupt-parent = <&gpio>;
> + interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
> +
> + local-mac-address = [ 00 11 22 33 44 55 ];
> + };
> + };
>
> --
> 2.43.0
>
>
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next prev parent reply other threads:[~2026-05-27 15:11 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 21:51 [PATCH net-next v2 00/10] net: Add ADIN1140 support Ciprian Regus via B4 Relay
2026-05-26 21:51 ` [PATCH net-next v2 01/10] dt-bindings: net: Add ADIN1140 Ciprian Regus via B4 Relay
2026-05-27 15:11 ` Conor Dooley [this message]
2026-05-28 16:46 ` Regus, Ciprian
2026-05-28 17:18 ` Conor Dooley
2026-05-26 21:51 ` [PATCH net-next v2 02/10] net: ethernet: oa_tc6: Handle the OA TC6 SPI protected mode Ciprian Regus via B4 Relay
2026-05-26 21:51 ` [PATCH net-next v2 03/10] net: ethernet: oa_tc6: add OA_TC6_BROKEN_PHY quirk flag Ciprian Regus via B4 Relay
2026-05-28 2:12 ` Andrew Lunn
2026-05-26 21:51 ` [PATCH net-next v2 04/10] net: ethernet: oa_tc6: Export the C45 access functions Ciprian Regus via B4 Relay
2026-05-28 2:13 ` Andrew Lunn
2026-05-26 21:51 ` [PATCH net-next v2 05/10] net: ethernet: oa_tc6: Export standard defined registers Ciprian Regus via B4 Relay
2026-05-28 2:21 ` Andrew Lunn
2026-05-26 21:51 ` [PATCH net-next v2 06/10] net: ethernet: oa_tc6: Add MMS register formatting macro Ciprian Regus via B4 Relay
2026-05-28 2:31 ` Andrew Lunn
2026-05-26 21:51 ` [PATCH net-next v2 07/10] net: phy: add generic helpers for direct C45 MMD access Ciprian Regus via B4 Relay
2026-05-28 2:33 ` Andrew Lunn
2026-05-26 21:51 ` [PATCH net-next v2 08/10] net: phy: microchip-t1s: use generic C45 MMD access helpers Ciprian Regus via B4 Relay
2026-05-28 2:33 ` Andrew Lunn
2026-05-26 21:51 ` [PATCH net-next v2 09/10] net: phy: Add support for the ADIN1140 PHY Ciprian Regus via B4 Relay
2026-05-28 2:50 ` Andrew Lunn
2026-05-26 21:51 ` [PATCH net-next v2 10/10] net: ethernet: adi: Add a driver for the ADIN1140 MACPHY Ciprian Regus via B4 Relay
2026-05-28 3:10 ` Andrew Lunn
2026-05-28 12:43 ` Regus, Ciprian
2026-05-28 14:05 ` Andrew Lunn
2026-05-29 9:21 ` Nuno Sá
2026-05-29 13:03 ` Andrew Lunn
2026-06-01 9:17 ` Nuno Sá
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