From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oi1-f201.google.com (mail-oi1-f201.google.com [209.85.167.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B07A23B841D for ; Fri, 12 Jun 2026 19:29:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781292564; cv=none; b=hvZgrxR+d75TyGehWOi9i//GEZ6dyXUMb0gq+gvjQKq7cJlSA7H3U5CLLgdJv/jK96GZb+Ph1bzwlR2JGkIDS/1z0usS+3udGLyQ5Dp/yPORWzz3k6hnMnu82U9Pckdbj2uOrNFS/q4FotdCASf1o3Icj2aSy9lwM8T703J/1ho= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781292564; c=relaxed/simple; bh=ZG9ZKKsG5def4qAkO71pmX+aMwBP6QL7ujSsyD5d3oQ=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=SdXmvKZZ2DN4uo69xFD5+vwkv0mC90rdimIUpC4ryWvB/MzNXMHXlFQbAhL4Xfrmt3jnE+3UzeGoIGK6DMiC4YaoixJlyl4pghdjmq2xw/zxes+A3Lpq1y0jST0ZXhrWxtsYOa1zzbo/OgMONQCtkOcKqTiVpoRHiVObgtHjDVA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--coltonlewis.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=BWFIUUM7; arc=none smtp.client-ip=209.85.167.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--coltonlewis.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="BWFIUUM7" Received: by mail-oi1-f201.google.com with SMTP id 5614622812f47-48661b2ef8eso1179027b6e.0 for ; Fri, 12 Jun 2026 12:29:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1781292559; x=1781897359; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=zUfvJDWatpVt+iiRM4HzP8H2jLIkMlFqueFXiDB4Pis=; b=BWFIUUM7+Htorv1lZO9DykvRagVsFGJtMf98QyOlKI9oMDIoZtfYjipdE6oP16XHcI ExinGVD+AWBLgcYKyV4aWK8x+JKlFXkIWtDGXm8ShhyWOk+R3XrYJmE2q29un4Ma7H8w QkcWbRDKMCyn4uIToz8fvuaS/5LMRLT0G+Osztbsbpd0TaesMl3sU2Ks/+QE7AcP0g+U brLunS2fhjkqITTwVbsxzl+vJPLhaRy32tD/FxF8WGk7kaXNL92LxaWr1VZDGgqGviEP EIMfWJQw8UhSE4Cqa9oQtyNGRjOm8bWWpiO4AW7hPtuaG5+c8ow0za8zKbzdcZgSwvhW 8/oA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781292559; x=1781897359; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=zUfvJDWatpVt+iiRM4HzP8H2jLIkMlFqueFXiDB4Pis=; b=nE20dyPBMgcRIHLlL4HvUbwt1QvIVQ/C4ObdBcKiNTZSPtikRk0xhE6ByQp0xhEH8V 9Nfv172GwZ8tPGSleaHz2Fs2dAeTyVbo/Goh1rIOejX1cDjzeagwnj7g/eD2FLyukILs 8thISrnJAHiKRduwzVafS5RsjhGr9VMyomBIajl6Xp4+/XzvAYBn4CZzTbtaa9c8HFry Ag8iF0cWM0DsghbNcsH6fJvL07U8ZJK8O6K0Mtr36cpGg6Gv3SVCm4hpuB+B9fIS3Lub T9hbZNNl1PpUC6KoR/3ifIOIy9SRwV3x/QpCV3hAX2AAAkzinW3imcS1PSlOxf3ha2Z5 dLVA== X-Forwarded-Encrypted: i=1; AFNElJ+8Buui520+nT/TMADt2jBqX2knctKTElj3N66i74ncXaoLk7AtyzLfWG7nfZc8SS2Izrwn6gmDvoQ=@vger.kernel.org X-Gm-Message-State: AOJu0YxbUh00kbxvLeX0ObUvo4Cv3QEcCjO/DhUldqudaSFwDDX4EHAZ SO1aEIMixrXxTNdsRyq84RDKbQW1V5/WAnSthKDnVH2/jXYhYdLzeGz5j5TE1VT+98pCTYkJRL4 5UogRwQJT45LFNdZBtx2+8IJsmw== X-Received: from jabjq11.prod.google.com ([2002:a05:6638:8d8b:b0:5e2:7e1d:1f79]) (user=coltonlewis job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6808:1790:b0:47b:bd7b:10e5 with SMTP id 5614622812f47-4872f35387fmr2525333b6e.3.1781292559384; Fri, 12 Jun 2026 12:29:19 -0700 (PDT) Date: Fri, 12 Jun 2026 19:28:58 +0000 In-Reply-To: <20260612192909.1153907-1-coltonlewis@google.com> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260612192909.1153907-1-coltonlewis@google.com> X-Mailer: git-send-email 2.54.0.1136.gdb2ca164c4-goog Message-ID: <20260612192909.1153907-11-coltonlewis@google.com> Subject: [PATCH 10/21] KVM: arm64: Set up MDCR_EL2 to handle a Partitioned PMU From: Colton Lewis To: kvm@vger.kernel.org Cc: Alexandru Elisei , Paolo Bonzini , Jonathan Corbet , Russell King , Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , Mingwei Zhang , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Mark Rutland , Shuah Khan , Ganapatrao Kulkarni , James Clark , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-perf-users@vger.kernel.org, linux-kselftest@vger.kernel.org, Colton Lewis Content-Type: text/plain; charset="UTF-8" Set up MDCR_EL2 to handle a Partitioned PMU. If partitioned, set the HPME, HPMD, and HCCD bits. If we have the ability to use Fine Grain Traps (FEAT_FGT) also, unset the TPM and TPMCR bits that trap all PMU accesses and set HPMN to the correct number of guest counters so hardware enforces the right values. Signed-off-by: Colton Lewis --- arch/arm64/kvm/debug.c | 27 ++++++++++++++++++++++++--- arch/arm64/kvm/pmu.c | 7 +++++++ 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c index f4d7b12045e8f..c84321277d893 100644 --- a/arch/arm64/kvm/debug.c +++ b/arch/arm64/kvm/debug.c @@ -43,14 +43,35 @@ static void kvm_arm_setup_mdcr_el2(struct kvm_vcpu *vcpu) * This also clears MDCR_EL2_E2PB_MASK and MDCR_EL2_E2TB_MASK * to disable guest access to the profiling and trace buffers */ - vcpu->arch.mdcr_el2 = FIELD_PREP(MDCR_EL2_HPMN, - *host_data_ptr(nr_event_counters)); + + vcpu->arch.mdcr_el2 = FIELD_PREP(MDCR_EL2_HPMN, *host_data_ptr(nr_event_counters)); vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM | MDCR_EL2_TPMS | MDCR_EL2_TTRF | MDCR_EL2_TPMCR | MDCR_EL2_TDRA | - MDCR_EL2_TDOSA); + MDCR_EL2_TDOSA | + MDCR_EL2_HPME); + + if (kvm_pmu_is_partitioned(vcpu->kvm)) { + u8 nr_guest_cntr = vcpu->kvm->arch.nr_pmu_counters; + + vcpu->arch.mdcr_el2 |= (MDCR_EL2_HPMD | MDCR_EL2_HCCD); + + /* + * Take out the coarse grain traps if we are using + * fine grain traps and enforce counter access with + * HPMN. + */ + if (!vcpu_on_unsupported_cpu(vcpu) && + cpus_have_final_cap(ARM64_HAS_FGT) && + (cpus_have_final_cap(ARM64_HAS_HPMN0) || nr_guest_cntr > 0)) { + vcpu->arch.mdcr_el2 &= ~(MDCR_EL2_TPM | MDCR_EL2_TPMCR | MDCR_EL2_HPMN); + vcpu->arch.mdcr_el2 |= FIELD_PREP(MDCR_EL2_HPMN, nr_guest_cntr); + } + + + } /* Is the VM being debugged by userspace? */ if (vcpu->guest_debug) diff --git a/arch/arm64/kvm/pmu.c b/arch/arm64/kvm/pmu.c index 9ad3520417413..55cda8021400a 100644 --- a/arch/arm64/kvm/pmu.c +++ b/arch/arm64/kvm/pmu.c @@ -552,6 +552,13 @@ u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm) if (cpus_have_final_cap(ARM64_WORKAROUND_PMUV3_IMPDEF_TRAPS)) return 1; + /* + * If partitioned then we are limited by the max counters in + * the guest partition. + */ + if (pmu_is_partitioned(arm_pmu)) + return arm_pmu->max_guest_counters; + /* * The arm_pmu->cntr_mask considers the fixed counter(s) as well. * Ignore those and return only the general-purpose counters. -- 2.54.0.1136.gdb2ca164c4-goog