From: Congkai Tan <congkai@amazon.com>
To: Oliver Upton <oupton@kernel.org>, <kvmarm@lists.linux.dev>,
<linux-arm-kernel@lists.infradead.org>
Cc: Congkai Tan <congkai@amazon.com>, Marc Zyngier <maz@kernel.org>,
"Joey Gouly" <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
"Jonathan Corbet" <corbet@lwn.net>,
Shuah Khan <skhan@linuxfoundation.org>,
"Haris Okanovic" <harisokn@amazon.com>,
Geoff Blake <blakgeof@amazon.com>,
"Stanislav Spassov" <stanspas@amazon.de>, <kvm@vger.kernel.org>,
<linux-doc@vger.kernel.org>, <linux-kselftest@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v3 0/4] KVM: arm64: Expose PMMIR_EL1.SLOTS to guests
Date: Wed, 22 Jul 2026 20:26:58 +0000 [thread overview]
Message-ID: <20260722202702.4165917-1-congkai@amazon.com> (raw)
Today when the perf tool runs in a guest on cores with PMUv3p4, it fails
to parse the default metrics with "Failure to read '#slots'", since perf
can only read 0 from sysfs caps/slots, which is backed by PMMIR_EL1.SLOTS
that KVM traps as RAZ/WI.
Taking into account backward compatibility and heterogeneous systems, the
exposure of PMMIR_EL1.SLOTS is gated behind a new vCPU feature flag:
- Patch 1 exposes PMMIR_EL1.SLOTS of the selected PMU under the (as yet
unsettable) KVM_ARM_VCPU_PMU_V3_STRICT flag, and adds userspace get/set
for PMMIR_EL1 so that SLOTS can be reset to 0 for backward
compatibility.
- Patch 2 stops masking STALL_SLOT* in PMCEID1 under the flag.
- Patch 3 makes strict-mode userspace configure the number of event
counters via the KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS attribute rather
than PMCR_EL0.N, whose meaning is context-dependent under NV.
- Patch 4 adds the KVM_ARM_VCPU_PMU_V3_STRICT flag itself: when set, KVM
does not create a default PMU during vCPU init, and the VMM must select
one explicitly via KVM_ARM_VCPU_PMU_V3_SET_PMU before the first
KVM_RUN. This flips the gate on and can serve as an umbrella flag for
future PMUv3 UAPI changes.
When the flag is not set, behaviors are unchanged.
v2: https://lore.kernel.org/r/20260702190421.420992-1-congkai@amazon.com
v1: https://lore.kernel.org/r/20260601193954.2103455-1-congkai@amazon.com
v2 -> v3 changes:
- Reordered so the KVM_ARM_VCPU_PMU_V3_STRICT flag / KVM_CAP exposure
comes last (now patch 4), after the flag-guarded behavior patches.
- Reworked on top of Oliver Upton's refinements (thanks!):
* Move the NULL-arm_pmu check into kvm_arm_pmu_v3_init() (returns
-ENXIO) instead of failing at the first KVM_RUN, and report zero
counters from kvm_arm_pmu_get_max_counters() before a PMU is set.
* Documentation and -ENXIO ordering notes for the PMU device
attributes (SET_PMU must precede INIT/FILTER).
- New patch (Oliver): ignore userspace writes to PMCR_EL0.N under the
strict flag and require the KVM_ARM_VCPU_PMU_V3_SET_NR_COUNTERS
attribute, since PMCR_EL0.N is context-dependent under NV.
- Advertise the KVM_CAP_ARM_PMU_V3_STRICT capability.
- Documentation fixes in api.rst (the flag Requires KVM_ARM_VCPU_PMU_V3).
Congkai Tan (3):
KVM: arm64: Expose PMMIR_EL1.SLOTS under strict PMUv3 UAPI
KVM: arm64: Advertise STALL_SLOT* in PMCEID1 under strict PMUv3 UAPI
KVM: arm64: Add KVM_ARM_VCPU_PMU_V3_STRICT vCPU feature
Oliver Upton (1):
KVM: arm64: Ignore writes to PMCR_EL0.N when using strict UAPI
Documentation/virt/kvm/api.rst | 11 ++++
Documentation/virt/kvm/devices/vcpu.rst | 11 +++-
arch/arm64/include/asm/kvm_host.h | 5 +-
arch/arm64/include/uapi/asm/kvm.h | 1 +
arch/arm64/kvm/arm.c | 19 ++++--
arch/arm64/kvm/pmu-emul.c | 54 ++++++++++++----
arch/arm64/kvm/sys_regs.c | 64 ++++++++++++++++++-
include/kvm/arm_pmu.h | 4 ++
include/uapi/linux/kvm.h | 1 +
.../selftests/kvm/arm64/get-reg-list.c | 1 +
10 files changed, 149 insertions(+), 22 deletions(-)
base-commit: 8cdeaa50eae8dad34885515f62559ee83e7e8dda
--
2.50.1
next reply other threads:[~2026-07-22 20:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-22 20:26 Congkai Tan [this message]
2026-07-22 20:26 ` [PATCH v3 1/4] KVM: arm64: Expose PMMIR_EL1.SLOTS under strict PMUv3 UAPI Congkai Tan
2026-07-22 20:27 ` [PATCH v3 2/4] KVM: arm64: Advertise STALL_SLOT* in PMCEID1 " Congkai Tan
2026-07-22 20:27 ` [PATCH v3 3/4] KVM: arm64: Ignore writes to PMCR_EL0.N when using strict UAPI Congkai Tan
2026-07-22 20:27 ` [PATCH v3 4/4] KVM: arm64: Add KVM_ARM_VCPU_PMU_V3_STRICT vCPU feature Congkai Tan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260722202702.4165917-1-congkai@amazon.com \
--to=congkai@amazon.com \
--cc=blakgeof@amazon.com \
--cc=catalin.marinas@arm.com \
--cc=corbet@lwn.net \
--cc=harisokn@amazon.com \
--cc=joey.gouly@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-kselftest@vger.kernel.org \
--cc=maz@kernel.org \
--cc=oupton@kernel.org \
--cc=pbonzini@redhat.com \
--cc=skhan@linuxfoundation.org \
--cc=stanspas@amazon.de \
--cc=suzuki.poulose@arm.com \
--cc=will@kernel.org \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox