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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47fd4562a38sm22160461f8f.21.2026.08.02.02.04.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Aug 2026 02:04:04 -0700 (PDT) Date: Sun, 2 Aug 2026 10:04:00 +0100 From: David Laight To: Jonathan Cameron Cc: Rodrigo Alencar via B4 Relay , rodrigo.alencar@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-hardening@vger.kernel.org, Lars-Peter Clausen , Michael Hennerich , David Lechner , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Jonathan Corbet , Shuah Khan , Kees Cook , "Gustavo A. R. Silva" Subject: Re: [PATCH v10 11/17] iio: frequency: ad9910: add basic parallel port support Message-ID: <20260802100400.588fa107@pumpkin> In-Reply-To: <20260802015607.7d7d4dd8@jic23-huawei> References: <20260729-ad9910-iio-driver-v10-0-aa1f6167729e@analog.com> <20260729-ad9910-iio-driver-v10-11-aa1f6167729e@analog.com> <20260802015607.7d7d4dd8@jic23-huawei> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Sun, 2 Aug 2026 01:56:07 +0100 Jonathan Cameron wrote: > On Wed, 29 Jul 2026 09:25:38 +0100 > Rodrigo Alencar via B4 Relay wrote: > > > From: Rodrigo Alencar > > > > Add parallel port support with amplitude, phase and frequency channels. > > Those will be buffered capable channels, but only basic control of offset > > and scale are implemented at this point. There are separate amplitude > > and phase control for polar destination, which will provide different scan > > types. Enabling and disabling of parallel mode will be implemented with > > buffer setup ops or with update_scan_mode() once IIO backend integration > > is in place. > > > > Signed-off-by: Rodrigo Alencar > Hmm. Curious... clang --version gives 22.1.8 on x86_64. > > make LLVM=1 LOCALVERSION= -j12 W=1 C=1 > DESCEND objtool > Documentation/.renames.txt: warning: ignored by one of the .gitignore files > CC [M] drivers/iio/frequency/ad9910.o > In file included from drivers/iio/frequency/ad9910.c:10: > In file included from ./include/linux/clk.h:13: > In file included from ./include/linux/kernel.h:26: > In file included from ./include/linux/math.h:6: > ./arch/x86/include/asm/div64.h:113:8: error: invalid operand for instruction > 113 | asm ("addq %[add], %[lo]; adcq $0, %[hi]" : > | ^ > :1:7: note: instantiated into assembly here > 1 | addq $2147483648, %rax; adcq $0, %rdx > | ^~~~~~~~~~~~ > 1 error generated. > make[5]: *** [scripts/Makefile.build:289: drivers/iio/frequency/ad9910.o] Error 1 > make[4]: *** [scripts/Makefile.build:549: drivers/iio/frequency] Error 2 > make[3]: *** [scripts/Makefile.build:549: drivers/iio] Error 2 > make[2]: *** [scripts/Makefile.build:549: drivers] Error 2 > make[1]: *** [/home/jic23/src/kernel/iio/Makefile:2184: .] Error 2 > make: *** [Makefile:248: __sub-make] Error 2 > > > > --- > > drivers/iio/frequency/ad9910.c | 154 +++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 154 insertions(+) > > > > diff --git a/drivers/iio/frequency/ad9910.c b/drivers/iio/frequency/ad9910.c > > index b41b011af281..aaeff2e7640e 100644 > > --- a/drivers/iio/frequency/ad9910.c > > +++ b/drivers/iio/frequency/ad9910.c > > > > static int ad9910_read_raw(struct iio_dev *indio_dev, > > @@ -691,6 +753,48 @@ static int ad9910_read_raw(struct iio_dev *indio_dev, > > *val = 0; > > *val2 = tmp64 >> 14; > > return IIO_VAL_INT_PLUS_NANO; > > + case AD9910_CHAN_IDX_PARALLEL_PHASE: > > + *val = 0; > > + *val2 = AD9910_PI_NANORAD >> 15; > > + return IIO_VAL_INT_PLUS_NANO; > > + case AD9910_CHAN_IDX_PARALLEL_FREQ: > > + tmp32 = FIELD_GET(AD9910_CFR2_FM_GAIN_MSK, > > + st->reg[AD9910_REG_CFR2].val32); > > + tmp64 = (u64)st->data.sysclk_freq_hz << tmp32; > > + tmp64 = ad9910_rational_scale(tmp64, NANO, BIT_ULL(32)); > > Process of elimination points me to this line which is a slim wrapper. > > static inline u64 ad9910_rational_scale(u64 input, u64 scale, u64 reference) > { > return mul_u64_add_u64_div_u64(input, scale, reference >> 1, reference); > } > > David, any thoughts? Lots of instructions only support sign extending 32bit immediates. The asm constraint for the ADCQ needs to be "erm" not "irm". I bet that is true elsewhere as well. See source/arch/x86/include/asm/div64.h line 114 I'm actually surprised you see it with clang - it usually prefers the "m" constraint. I'll try to find a source tree that is clean enough to generate a patch. David > > For now I'm backing out the series. > > > + *val = div_s64_rem(tmp64, NANO, val2); > > + return IIO_VAL_INT_PLUS_NANO; > > + case AD9910_CHAN_IDX_PARALLEL_POLAR_AMP: > > + tmp64 = (u64)st->data.output_current_uA * > > + AD9910_NANO_MILLIAMP_PER_MICROAMP; > > + *val = 0; > > + *val2 = tmp64 >> 8; > > + return IIO_VAL_INT_PLUS_NANO; > > + case AD9910_CHAN_IDX_PARALLEL_POLAR_PHASE: > > + *val = 0; > > + *val2 = AD9910_PI_NANORAD >> 7; > > + return IIO_VAL_INT_PLUS_NANO; > > + default: > > + return -EINVAL; > > + }