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This allows multiple independent memory transfers to be described in a single linked list and submitted to the hardware as one DMA transaction, without any CPU intervention between items. The IP processes LL items strictly in order, guaranteeing that scatter-gather entries are never reordered. The `DMA_SG` transaction type and `device_prep_dma_sg()` API were previously removed from the dmaengine core in commit c678fa66341c ("dmaengine: remove DMA_SG as it is dead code in kernel") because there were no in-tree users at the time. This series reintroduces `DMA_SG` and `device_prep_dma_sg()`. The reintroduced API takes separate source and destination scatter-gather lists, where entry `i` of the source list is transferred to entry `i` of the destination list. This enables the eDMA hardware to process all pairs as a single transaction without CPU intervention between transfers. The primary use case is MHI endpoint ring caching. When an MHI ring wraps around, data spans two non-contiguous memory regions (tail and head portions). Previously this required two separate DMA transactions with two interrupts. With this series, both regions are submitted as a single batched transaction, reducing submission overhead and interrupt count. The series includes: 1. Core DMA engine API and DW eDMA driver implementation 2. PCI EPF MHI driver support for batched transfers 3. MHI endpoint ring caching optimization using batched reads Expected benefits: - Reduced DMA submission overhead for multiple transfers - Better hardware utilization through batched operations - Lower latency for ring wraparound scenarios Signed-off-by: Sumit Kumar --- Changes in v2: - Reintroduce `DMA_SG` and `device_prep_dma_sg()` instead of a new API. (Vinod) - Use two parallel scatterlist arrays (src_sg/dst_sg) instead of extending struct scatterlist with a second DMA address. (Robin Murphy) - Add explicit eDMA LL hardware description and ordering guarantee to cover letter. (Mani) - Link to v1: https://lore.kernel.org/r/20260313-dma_multi_sg-v1-0-8fabb0d1a759@oss.qualcomm.com --- Sumit Kumar (5): dmaengine: Add DMA_SG support for multi-buffer scatter-gather transfers dmaengine: dw-edma: Add DMA_SG support PCI: epf-mhi: Use a define for the DMA transfer timeout PCI: epf-mhi: Add batched DMA read support bus: mhi: ep: Use batched read for ring caching Documentation/driver-api/dmaengine/provider.rst | 21 +++ drivers/bus/mhi/ep/main.c | 3 +- drivers/bus/mhi/ep/ring.c | 36 +++--- drivers/dma/dmaengine.c | 1 + drivers/dma/dw-edma/dw-edma-core.c | 87 ++++++++++++- drivers/dma/dw-edma/dw-edma-core.h | 10 +- drivers/pci/endpoint/functions/pci-epf-mhi.c | 165 +++++++++++++++++++++++- include/linux/dmaengine.h | 35 +++++ include/linux/mhi_ep.h | 7 + 9 files changed, 339 insertions(+), 26 deletions(-) --- base-commit: b4515cf4156356e8f4fe6e0fdc17f59adab9772f change-id: 20260108-dma_multi_sg-c217650373c2 Best regards, -- Sumit Kumar