From: Eliot Courtney <ecourtney@nvidia.com>
To: "Danilo Krummrich" <dakr@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Boqun Feng" <boqun@kernel.org>, "Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Trevor Gross" <tmgross@umich.edu>,
"Tamir Duberstein" <tamird@kernel.org>,
"Alexandre Courbot" <acourbot@nvidia.com>,
"Onur Özkan" <work@onurozkan.dev>,
"Yury Norov" <yury.norov@gmail.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <skhan@linuxfoundation.org>
Cc: driver-core@lists.linux.dev, rust-for-linux@vger.kernel.org,
linux-kernel@vger.kernel.org, nova-gpu@lists.linux.dev,
dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org,
Eliot Courtney <ecourtney@nvidia.com>,
Joel Fernandes <joelagnelf@nvidia.com>
Subject: [PATCH 06/12] gpu: nova-core: mm: Add PRAMIN window registers
Date: Wed, 05 Aug 2026 14:44:53 +0900 [thread overview]
Message-ID: <20260805-pramin-split-v1-6-ff3e84a75dac@nvidia.com> (raw)
In-Reply-To: <20260805-pramin-split-v1-0-ff3e84a75dac@nvidia.com>
From: Joel Fernandes <joelagnelf@nvidia.com>
PRAMIN apertures are a crucial mechanism for direct CPU read/write to
VRAM. Add the BAR0 window registers that position the PRAMIN aperture
on all supported GPU architectures: Turing, Ampere, Ada (via
`NV_PBUS_BAR0_WINDOW`), Hopper (via `gh100::NV_XAL_EP_BAR0_WINDOW`),
and Blackwell (via `gb100::NV_XAL_EP_BAR0_WINDOW`).
Hopper/Blackwell window-base registers are based on Eliot Courtney's
offlist reference patch.
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
[ecourtney: split the registers out of the PRAMIN patch into mm/regs.rs]
[ecourtney: drop the register read path]
[ecourtney: reword the message for the split, narrow visibility to mm]
[ecourtney: plain base fields, as the bitfield cast+shift patch is dropped]
[ecourtney: rename the target to VidMem, fix derives, redo the target docs]
Signed-off-by: Eliot Courtney <ecourtney@nvidia.com>
---
drivers/gpu/nova-core/mm.rs | 2 ++
drivers/gpu/nova-core/mm/regs.rs | 57 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 59 insertions(+)
diff --git a/drivers/gpu/nova-core/mm.rs b/drivers/gpu/nova-core/mm.rs
index f9d80ffbe01d..7d24ad790310 100644
--- a/drivers/gpu/nova-core/mm.rs
+++ b/drivers/gpu/nova-core/mm.rs
@@ -19,6 +19,8 @@
},
};
+mod regs;
+
/// Physical VRAM address in GPU video memory.
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
#[repr(transparent)]
diff --git a/drivers/gpu/nova-core/mm/regs.rs b/drivers/gpu/nova-core/mm/regs.rs
new file mode 100644
index 000000000000..541941918add
--- /dev/null
+++ b/drivers/gpu/nova-core/mm/regs.rs
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: GPL-2.0
+// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+
+//! Registers used by the memory management subsystems: the BAR0 PRAMIN window.
+
+use kernel::io::register;
+
+use crate::bounded_enum;
+
+// PRAMIN window
+
+bounded_enum! {
+ /// Target memory type for the BAR0 window register.
+ ///
+ /// Only VRAM is needed by the driver. Pre-Hopper window registers also define
+ /// system-memory targets that are unused here; Hopper+ uses a separate register
+ /// without a target field.
+ #[derive(Debug, Copy, Clone)]
+ pub(super) enum Bar0WindowTarget with TryFrom<Bounded<u32, 2>> {
+ /// Video memory (GPU framebuffer memory).
+ VidMem = 0,
+ }
+}
+
+register! {
+ /// BAR0 window control for PRAMIN access.
+ pub(super) NV_PBUS_BAR0_WINDOW(u32) @ 0x00001700 {
+ /// Target memory aperture for the window.
+ 25:24 target ?=> Bar0WindowTarget;
+ /// PRAMIN window base bits 39:16.
+ 23:0 base;
+ }
+}
+
+pub(super) mod gh100 {
+ use kernel::io::register;
+
+ register! {
+ /// Hopper register for PRAMIN window.
+ pub(crate) NV_XAL_EP_BAR0_WINDOW(u32) @ 0x0010fd40 {
+ /// PRAMIN window base bits 37:16.
+ 21:0 base;
+ }
+ }
+}
+
+pub(super) mod gb100 {
+ use kernel::io::register;
+
+ register! {
+ /// Blackwell GB10x/GB20x register for PRAMIN window.
+ pub(crate) NV_XAL_EP_BAR0_WINDOW(u32) @ 0x0010fd40 {
+ /// PRAMIN window base bits 38:16.
+ 22:0 base;
+ }
+ }
+}
--
2.55.0
next prev parent reply other threads:[~2026-08-05 5:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-05 5:44 [PATCH 00/12] gpu: nova-core: add PRAMIN window support Eliot Courtney
2026-08-05 5:44 ` [PATCH 01/12] rust: io: add Region::try_subregion Eliot Courtney
2026-08-05 10:43 ` Gary Guo
2026-08-07 5:39 ` Eliot Courtney
2026-08-05 5:44 ` [PATCH 02/12] rust: num: reject Bounded::shr overshifts at build time Eliot Courtney
2026-08-05 5:44 ` [PATCH 03/12] rust: num: add Bounded::shr_exact Eliot Courtney
2026-08-05 5:44 ` [PATCH 04/12] gpu: nova-core: mm: Add VramAddress type Eliot Courtney
2026-08-05 5:44 ` [PATCH 05/12] gpu: nova-core: mm: Implement Alignable and Debug for VramAddress Eliot Courtney
2026-08-05 5:44 ` Eliot Courtney [this message]
2026-08-05 5:44 ` [PATCH 07/12] gpu: nova-core: mm: Add the memory management HAL Eliot Courtney
2026-08-05 5:44 ` [PATCH 08/12] gpu: nova-core: mm: Add support to use PRAMIN windows to write to VRAM Eliot Courtney
2026-08-05 5:44 ` [PATCH 09/12] docs: gpu: nova-core: Document the PRAMIN aperture mechanism Eliot Courtney
2026-08-05 5:44 ` [PATCH 10/12] gpu: nova-core: mm: Add GpuMm centralized memory manager Eliot Courtney
2026-08-05 5:44 ` [PATCH 11/12] gpu: nova-core: Add self-test assertion macros and config option Eliot Courtney
2026-08-05 5:44 ` [PATCH 12/12] gpu: nova-core: mm: Add PRAMIN aperture self-tests Eliot Courtney
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