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From: Ivan Vecera <ivecera@redhat.com>
To: netdev@vger.kernel.org
Cc: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	Jakub Kicinski <kuba@kernel.org>, Jiri Pirko <jiri@resnulli.us>,
	Min Li <min.li@microchip.com>, Paolo Abeni <pabeni@redhat.com>,
	Petr Oros <poros@redhat.com>,
	Richard Cochran <richardcochran@gmail.com>,
	Vadim Fedorenko <vadim.fedorenko@linux.dev>,
	linux-kernel@vger.kernel.org, Jonathan Corbet <corbet@lwn.net>,
	Shuah Khan <skhan@linuxfoundation.org>,
	linux-doc@vger.kernel.org
Subject: [PATCH net-next v3 0/2] dpll: use pin owner's dpll ref for pin-level set callbacks
Date: Fri,  7 Aug 2026 11:59:24 +0200	[thread overview]
Message-ID: <20260807095926.386923-1-ivecera@redhat.com> (raw)

Pin-level attributes (frequency, phase adjust, embedded sync, reference
sync) are properties of the pin itself. The get callbacks already use
only the pin owner's DPLL reference, but the set callbacks iterate over
all registered DPLL devices, resulting in redundant HW writes for
drivers that share a pin across multiple DPLLs.

This series simplifies the set side to match the get side: call the set
callback only through the owner's reference.

Patch 1 prepares the zl3073x driver whose ref_sync_set callback had
per-channel behavior (setting priority on a single DPLL channel). It now
iterates all channels internally so it remains correct when invoked only
once.

Patch 2 drops the xa_for_each loops from dpll_pin_freq_set(),
dpll_pin_esync_set(), dpll_pin_ref_sync_state_set() and
dpll_pin_phase_adj_set(), along with the rollback logic and the per-ref
-EOPNOTSUPP validation scan. The dpll.rst documentation is updated to
reflect the new behavior.

v3:
  - Fix missing mutex_unlock on the normal loop path (was only on
    the early-continue branch) - folded into patch 1
  - Skip channels where sync ref priority is already NONE
  - Send __dpll_pin_change_ntf for the sync pin when priority changed
  - Reword dpll.rst to describe observable effect, restore rationale
  - Align changelog: "recommended" instead of "must"
  - Use 7-bit ASCII throughout
  - Rebase onto current origin/main
v2:
  - Split zl3073x ref_sync_set fix into a separate preparation patch
  - Update dpll.rst documentation to match the new behavior
  - Expand commit message to describe the -EOPNOTSUPP check change

Ivan Vecera (2):
  dpll: zl3073x: update all DPLL channels on ref_sync_set
  dpll: use pin owner's dpll ref for pin-level attribute setting

 Documentation/driver-api/dpll.rst |  11 +-
 drivers/dpll/dpll_netlink.c       | 213 +++++++-----------------------
 drivers/dpll/zl3073x/dpll.c       |  58 ++++++--
 3 files changed, 104 insertions(+), 178 deletions(-)


base-commit: 4fa4977a0d900f936bcae5cd2c510be5554e8dd6
-- 
2.54.0


             reply	other threads:[~2026-08-07  9:59 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-07  9:59 Ivan Vecera [this message]
2026-08-07  9:59 ` [PATCH net-next v3 1/2] dpll: zl3073x: update all DPLL channels on ref_sync_set Ivan Vecera
2026-08-07  9:59 ` [PATCH net-next v3 2/2] dpll: use pin owner's dpll ref for pin-level attribute setting Ivan Vecera
2026-08-08  9:58   ` Jiri Pirko

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