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[2a02:3100:aecb:d601:fc34:eb31:14a1:3704]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4998ca63e5csm29202615e9.2.2026.08.15.02.25.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 15 Aug 2026 02:25:44 -0700 (PDT) From: Karl Mehltretter To: Marc Zyngier Cc: Oliver Upton , Sascha Bischoff , Paolo Bonzini , Jonathan Corbet , Shuah Khan , Jonathan Cameron , Timothy Hayes , kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Karl Mehltretter Subject: [PATCH] Documentation: KVM: Fix the GICv5 KVM_IRQ_LINE PPI range Date: Sat, 15 Aug 2026 11:25:37 +0200 Message-Id: <20260815092537.31737-1-kmehltretter@gmail.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit KVM rejects GICv5 PPI irq_id values above 63, while the documented range extends to 127. KVM also rejects PPIs not present in the KVM_DEV_ARM_VGIC_USERSPACE_PPIS mask. That mask is populated by KVM_DEV_ARM_VGIC_CTRL_INIT; reading it beforehand currently succeeds but returns all zeroes. Correct the range, document the mask restriction, and require the mask to be queried after VGIC initialization. Fixes: b88d05a893cb ("KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE") Assisted-by: Claude:claude-fable-5 Signed-off-by: Karl Mehltretter --- Documentation/virt/kvm/api.rst | 4 +++- Documentation/virt/kvm/devices/arm-vgic-v5.rst | 3 +++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index e3003a241d5b0..6d8fd74174492 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -912,7 +912,9 @@ The irq_type field has the following values: in-kernel GICv5: SPI, irq_id between 0 and 65535 (incl.) - KVM_ARM_IRQ_TYPE_PPI: in-kernel GICv2/GICv3: PPI, irq_id between 16 and 31 (incl.) - in-kernel GICv5: PPI, irq_id between 0 and 127 (incl.) + in-kernel GICv5: PPI, irq_id between 0 and 63 (incl.), and + only if present in the mask returned by the + KVM_DEV_ARM_VGIC_USERSPACE_PPIS attribute (The irq_id field thus corresponds nicely to the IRQ ID in the ARM GIC specs) diff --git a/Documentation/virt/kvm/devices/arm-vgic-v5.rst b/Documentation/virt/kvm/devices/arm-vgic-v5.rst index d328cf1e22c1f..e24aed0c4afcd 100644 --- a/Documentation/virt/kvm/devices/arm-vgic-v5.rst +++ b/Documentation/virt/kvm/devices/arm-vgic-v5.rst @@ -35,6 +35,9 @@ Groups: populated with the userspace PPI mask. The lower __u64 contains the mask for the lower 64 PPIS, with the remaining 64 being in the second __u64. + Userspace must query this attribute after initializing the VGIC with + KVM_DEV_ARM_VGIC_CTRL_INIT. + This is a read-only attribute, and cannot be set. Attempts to set it are rejected. -- 2.53.0