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[83.28.44.7]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c21238700aesm296472666b.63.2026.08.15.22.08.18 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Sat, 15 Aug 2026 22:08:20 -0700 (PDT) Date: Sun, 16 Aug 2026 07:10:44 +0200 From: Michal Pecio To: frank.li@nxp.com Cc: corbet@lwn.net, dmaengine@vger.kernel.org, hch@infradead.org, imx@lists.linux.dev, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lizhijian@fujitsu.com, mst@redhat.com, rdunlap@infradead.org Subject: Re: [PATCH v2 1/1] docs: dma: correct dma_set_mask() sample code Message-ID: <20260816071044.331a2c51.michal.pecio@gmail.com> In-Reply-To: <20240401174159.642998-1-Frank.Li@nxp.com> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Hi, > There are bunch of codes in driver like > > if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) > dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)) > > Actually it is wrong because if dma_set_mask_and_coherent(64) fails, > dma_set_mask_and_coherent(32) will fail for the same reason. I encountered similar driver code and found it similarly suspicious. I arrived here searching for reasons to convince myself (and relevant maintainers) that removing this is indeed the right thing to do. But I have a few remaining questions and remarks. > And dma_set_mask_and_coherent(64) never returns failure. No realistic chance of the dev->dma_mask check (below) giving -EIO? > According to the definition of dma_set_mask(), it indicates the width > of address that device DMA can access. If it can access 64-bit > address, it must access 32-bit address inherently. So only need set > biggest address width. > > See below code fragment: > > dma_set_mask(mask) > { > mask = (dma_addr_t)mask; > > if (!dev->dma_mask || !dma_supported(dev, mask)) > return -EIO; > > arch_dma_set_mask(dev, mask); > *dev->dma_mask = mask; > return 0; > } > > dma_supported() will call dma_direct_supported or iommux's > dma_supported call back function. Aapparently, it may also use some 'dma_map_ops' and there is a bunch of those spread over drivers/ and arch/. But I gather they are expected to behave similarly as the functions named above? > --- a/Documentation/core-api/dma-api-howto.rst > +++ b/Documentation/core-api/dma-api-howto.rst > > +The standard 64-bit addressing device would do something like this:: > + > + dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)) > + > +dma_set_mask_and_coherent() never return fail when DMA_BIT_MASK(64). Typical > +error code like:: > + > + /* Wrong code */ > + if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) > + dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)) > + > +dma_set_mask_and_coherent() will never return failure when bigger then 32. > +So typical code like:: > + > + /* Recommended code */ > + if (support_64bit) > + dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)); > + else > + dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); > + This text is unclear. Two sentences begin with "Typical error code", then some code is quoted, and the sentences are cut abruptly without actually making any statement about the code in question. Thanks, Michal