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From: Manuel Ebner <manuelebnerli@mailbox.org>
To: Jonathan Corbet <corbet@lwn.net>, Shuah Khan <skhan@linuxfoundation.org>
Cc: Manuel Ebner <manuelebnerli@mailbox.org>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH] docs: misc-devices/spear-pcie-gadget.txt: Fix bracket and whitespace
Date: Sat,  5 Sep 2026 09:46:40 +0200	[thread overview]
Message-ID: <20260905074641.811164-2-manuelebnerli@mailbox.org> (raw)

Add missing ')' and remove needless whitespace.

Signed-off-by: Manuel Ebner <manuelebnerli@mailbox.org>
---
 Documentation/misc-devices/spear-pcie-gadget.rst | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/Documentation/misc-devices/spear-pcie-gadget.rst b/Documentation/misc-devices/spear-pcie-gadget.rst
index 09b9d6c7a..13333a209 100644
--- a/Documentation/misc-devices/spear-pcie-gadget.rst
+++ b/Documentation/misc-devices/spear-pcie-gadget.rst
@@ -37,9 +37,9 @@ read behavior of nodes:
 -----------------------
 
 =============== ==============================================================
-link 		gives ltssm status.
-int_type 	type of supported interrupt
-no_of_msi 	zero if MSI is not enabled by host. A positive value is the
+link		gives ltssm status.
+int_type	type of supported interrupt
+no_of_msi	zero if MSI is not enabled by host. A positive value is the
 		number of MSI vector granted.
 vendor_id	returns programmed vendor id (hex)
 device_id	returns programmed device id(hex)
@@ -53,7 +53,7 @@ write behavior of nodes:
 ------------------------
 
 =============== ================================================================
-link 		write UP to enable ltsmm DOWN to disable
+link		write UP to enable ltsmm DOWN to disable
 int_type	write interrupt type to be configured and (int_type could be
 		INTA, MSI or NO_INT). Select MSI only when you have programmed
 		no_of_msi node.
@@ -65,7 +65,7 @@ device_id	write device id(hex) to be programmed.
 bar0_size	write size of bar0 in hex. default bar0 size is 1000 (hex)
 		bytes.
 bar0_address	write	address of bar0 mapped area in hex. (default mapping of
-		bar0 is SYSRAM1(E0800000). Always program bar size before bar
+		bar0 is SYSRAM1(E0800000)). Always program bar size before bar
 		address. Kernel might modify bar size and address for alignment,
 		so read back bar size and address after writing to cross check.
 bar0_rw_offset	write offset of bar0 for which	bar0_data will write value.
-- 
2.54.0


             reply	other threads:[~2026-09-05  7:47 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-05  7:46 Manuel Ebner [this message]
2026-09-05 18:12 ` [PATCH] docs: misc-devices/spear-pcie-gadget.txt: Fix bracket and whitespace Randy Dunlap

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