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Miller" , Eric Dumazet , Paolo Abeni , Andrew Lunn , Simon Horman , Jiri Pirko , Arkadiusz Kubalewski , Jonathan Corbet , Randy Dunlap , Shuah Khan , netdev@vger.kernel.org Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Sagi Maimon Subject: [PATCH net-next 8/9] ptp: ocp: tolerate a latched FAILED when entering configuration mode Date: Tue, 22 Sep 2026 17:28:28 +0300 Message-ID: <20260922142829.57740-9-maimon.sagi@gmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20260922142829.57740-1-maimon.sagi@gmail.com> References: <20260922142829.57740-1-maimon.sagi@gmail.com> Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The first status wait after EN_CFG_TP used adva_x1_cpld_wait_ready(), which turns a set CPLD_STATUS_FAILED into -EIO. FAILED is latched across operations and nothing in the driver clears it - the failure path only sends DIS_CFG - so once a part had failed an operation, every later "devlink dev flash ... component fw.cpld" would return -EIO at the enable step, before reaching the ERASE and REFRESH that would put the part back into a defined state. That contradicts the recovery this driver relies on elsewhere: the page loop documents an aborted update as recoverable because fw.cpld stays advertised so the image can be written again. Use adva_x1_cpld_wait_idle(), which waits the operation out whatever its outcome, and let the CPLD_STATUS_ENAB check that follows decide whether the part actually entered configuration mode. machxo2_write_init() in drivers/fpga/machxo2-spi.c tests FAIL the same way, after the enable has completed rather than as a precondition for it. Fixes: a4b7c15aa78f ("ptp: ocp: add TAP CPLD flashing via devlink") Signed-off-by: Sagi Maimon --- drivers/ptp/ptp_ocp.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/ptp/ptp_ocp.c b/drivers/ptp/ptp_ocp.c index 0d6d0c02882c..4f2bf54a23c2 100644 --- a/drivers/ptp/ptp_ocp.c +++ b/drivers/ptp/ptp_ocp.c @@ -5018,9 +5018,16 @@ static int adva_x1_cpld_flash(struct ptp_ocp *bp, struct devlink *devlink, */ bp->cpld_in_config_mode = true; + /* wait_idle(), not wait_ready(): FAILED is latched across operations + * and nothing here clears it, so treating it as fatal at the enable + * step would make every later flash of a part that has failed once + * return -EIO before reaching the ERASE and REFRESH that put it back + * into a defined state. ENAB below is what says the enable worked; + * machxo2-spi.c likewise tests FAIL only after ISC_ENABLE completes. + */ err = adva_x1_cpld_write(bp, CPLD_CMD_EN_CFG_TP); if (!err) - err = adva_x1_cpld_wait_ready(bp, 5000); + err = adva_x1_cpld_wait_idle(bp, 5000); if (err) goto exit_config; -- 2.47.0