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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?D+hMZDL5GTVRnJXhX1ycnCQKro2VyOEevI/a0FU7AAg28ujiSf+rHIhhO12m?= =?us-ascii?Q?k4QQ9yzrDo+oELqawOVMREAnHiJR5NFinC3U2xcGDFq673x7w5VZS/at7Raj?= =?us-ascii?Q?0J+c0p9WC4nE8hJH0jnM5ERRStnlE0nUKVXSwMZ5exij8mUwbwqzI5hCGa+m?= =?us-ascii?Q?Bg015eaqX2VgtIePU8gIYGgxmGiFExRLd6Uc2wLCAhDXiAi9NKmy7XJBnTRv?= =?us-ascii?Q?GGZo0+hy6qGNEiGmcwCHC4vf65QgK6D62nQ4MGhltAPriahvYpBplDOv1uaU?= =?us-ascii?Q?ozv5SkiwEkfrhYwnbUKFP0P6xHCKKFrH/Yl+5bHitWBCAyQ8jH5HiWWDoPZp?= =?us-ascii?Q?zGoF3critkIlrvNjLKqX6u84q4giDV9sMQF2jeA/+O6gBW7IjJbCnT6FOLop?= =?us-ascii?Q?v0CcFtVDNMJJ+vPVApe4Ys7aSLXLrqMghOFdTMCNEcSKlnzSEiovJ0mHaa1W?= =?us-ascii?Q?MItcwDCKoFJ/6cFwyRAQ+uZx2f3j9GJuf6RKMiDVsdCpeJbKeTuXspl8OMm3?= =?us-ascii?Q?IaHKbwPdPoTmToFdnxI2NSf17mtzs9fa6XmpQpH8W0Fs8qV+fXF7YJYwgVDr?= =?us-ascii?Q?BEJSSsNXUk9ZE3rtO5N7YxBm5DMrAYlgnbkkrQqFj4KZOXQ0EqDNkQVGSdE/?= =?us-ascii?Q?NnAtXd8Hnw36E8iW4quo8bO0qDrDTOaju73R3EqUw8Xv1q8oS+8bH6IApzaC?= =?us-ascii?Q?VGTpYt4nDjsyzLxvjYBWVI5gyA3QfT2UV6uFkl9M2Kp9AQmrCfJj6g6LPn8f?= =?us-ascii?Q?89Ocn5Qh6ALlVH+QAalVUfabKUMT8Q7tAN8i/QRBkNurisbILo2/aWpLPUNM?= =?us-ascii?Q?uVky9WDRqqQ7Vcy1H3FcMQv9FFyyd2TDqmNKEREh9EOXOuCHKXy2oumCHkTD?= =?us-ascii?Q?TbzLGP/regQaBHa0oGpc2t+48aMa2meAeuAvgYaC0aGf25tGmgZoGff4cx5b?= =?us-ascii?Q?TQHMBcx84NLpV15YBDnxcS2h6p3IHmI26OsV2WdmmBxGnPXA9+nXC+w6BN2O?= =?us-ascii?Q?jhBVsgq8MDTc3ytMMW5d7BT84vZa2UJPUjWs9WOYBb3erhmKWm990o/ljjpR?= =?us-ascii?Q?8Y38CuOIy/8aNlDO5FVdbbO1JrTlTLYW23gl+AF9v9HwVP1Bbz3gmxQ6GKlg?= =?us-ascii?Q?8PXCltQczsne/uBFFmgZmLQqqxDBz/OGFJ9aXGCOWbKZFTdnGqtkuhgRKSAh?= =?us-ascii?Q?tvPo+pXMX2HE5Fow6d5qN617leVavFOuEVfFA56AP7ZXLnczDarPnzMN4VDo?= =?us-ascii?Q?sbnC3Xew2EaQvoW6YIlimQgqpG/J3Y3xC4TrkHDSZBqjWHpzFrs9BuuS1RN8?= =?us-ascii?Q?aA7DRE19LJmt58DiI9fPo1Y6Y3zm8NG4MaJxkQVUi1pBiriAijhyPVuEpafG?= =?us-ascii?Q?VgBw+X3Wq5lekPbkP2/RygtNhSfMIsPHUCPjDiiH+ImbD8Q+/3poNBmx/j7M?= =?us-ascii?Q?tUtB2rP4cgCNXqxXk4E7fSJHcA5R1iU8cPL5FAju27US1F/hDtZq5hKWUtP+?= =?us-ascii?Q?P7UXGDIeJTeuBA10sJK2B2h5qXlJbLfCoZ4/0UJ4UMxJZPI7i8OOTgoD5yXB?= =?us-ascii?Q?ELgQDvmMz/jI8YGWWobLSeEii5waOIl8pwclhMyju0214ku/67ZSGVL8LIbm?= =?us-ascii?Q?jQEOqIs58IjIPIv9VPhB7TQxoj0KfMJkR+KPehLdgxlqYdzaPjZtda+nysm1?= =?us-ascii?Q?vtNrgp1rrcYJXrD5D2up/cDZoFHnjvi9jL8tdRv2118OYZmu?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: eede5eb7-558e-4978-4183-08df1bfbd7e2 X-MS-Exchange-CrossTenant-AuthSource: CHBPR12MB731189.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Sep 2026 18:27:38.3404 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 4WkVDWy9d1m2jBxVXSVCgjtHKEoJtN8zmy/AWLWcfFFM9j7383msZvR4xirS9tTG X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8868 On Thu, Sep 24, 2026 at 05:29:52PM -0700, Jonathan Cameron wrote: > This one at least does it via base and sum. But that then separates it from > the spec? That is sort of the case anyway because the spec has the full > number. 0xC400_0110 so I guess not too bad. I wasn't sure what to do with this since the spec had the full hex and we have these helper macros.. I made it look more like something else with the offset style instead of the function call style: > > +#define ARM_DRTM_SMC_VERSION (ARM_DRTM_SMC_FN_BASE + 0x00) IDK, maybe ARM_DRTM_SMC_FN_BASE(0x110) is more connected to the spec, but I'm used to doing it like this from ioctl land which is very similar. > > +#define ARM_DRTM_FEATURE_SELECTOR BIT_U64(63) > > +#define ARM_DRTM_FEATURE_TPM 0x01 > > +#define ARM_DRTM_FEATURE_MIN_MEMORY 0x02 > > +#define ARM_DRTM_FEATURE_DMA_PROTECTION 0x03 > > +#define ARM_DRTM_FEATURE_BOOT_PE 0x04 > > +#define ARM_DRTM_FEATURE_TCB_HASH 0x05 > > +#define ARM_DRTM_FEATURE_IMAGE_AUTH 0x06 > > Nice to have a mask for the 8 bits of the feature field. OK > Also nice to keep order the same as the SMC defines which would put this after > version. That also puts it next to the values returned for each feature. I reorganized everything > > +#define ARM_DRTM_TPM_ALG_MASK GENMASK_U64(15, 0) > > +#define ARM_DRTM_TPM_HASHING BIT_U64(32) > > +#define ARM_DRTM_PCR_SCHEMA_MASK GENMASK_U64(36, 33) > > +#define ARM_DRTM_PCR_SCHEMA_DEFAULT BIT_U64(33) > > +#define ARM_DRTM_PCR_SCHEMA_AUTHORITIES BIT_U64(34) > > Ah. Always love a field made up of a bunch of bits. Hard to define > cleanly. Do you actually need the PCR_SCHEMA_MASK? I did it with a field content which gets reused in the launch struct: /* * PCR schema numbers. ARM_DRTM_PCR_SCHEMA_MASK is a bitmap indexed by these, * and the Launch Features ARM_DRTM_LAUNCH_PCR_SCHEMA_MASK field holds one. */ #define ARM_DRTM_PCR_SCHEMA_DEFAULT 0 #define ARM_DRTM_PCR_SCHEMA_AUTHORITIES 1 /* * DMA protection types. ARM_DRTM_DMA_PROTECTION_MASK is a bitmap indexed by * these, and the Launch Features ARM_DRTM_LAUNCH_DMA_PROTECTION_MASK field * holds one. */ #define ARM_DRTM_DMA_PROTECTION_COMPLETE 0 #define ARM_DRTM_DMA_PROTECTION_REGION 1 Have to use BIT() to get the bitmap encoding. > Same here. I vaguely wonder if it is worth adding something > reflecting the relevant feature ID to each of these defines > so we know what the are referring to? I added comments and spec references for everything > > +#define ARM_DRTM_LAUNCH_HASH_FIRMWARE 0 > > +#define ARM_DRTM_LAUNCH_HASH_TPM BIT_U32(0) > > I'd rather see them as fields and field value pairs but > can see that is going to get a bit verbose. I think that would be too verbose in this case, and the usage is very limited. > > +static inline s64 arm_drtm_features(u64 function_or_feature, u64 *value) > > +{ > > + struct arm_smccc_res res; > > + s64 status; > > + > > + arm_smccc_1_1_smc(ARM_DRTM_SMC_FEATURES, function_or_feature, > > + 0, 0, 0, 0, 0, 0, &res); > > + status = res.a0; > > + if (status >= 0 && value) > > + *value = res.a1; > If status == 0, is res.a1 useful? > You have a helpful comment at the call site in the final patch but none > the less I have read the spec section a couple of times and have no idea. I read the spec as 0 is not allowed. I changed this around to have two wrapper functions, which works a bit better. static inline s64 arm_drtm_query_function(u64 function_id) { struct arm_smccc_res res; arm_smccc_1_1_smc(ARM_DRTM_SMC_FEATURES, function_id, 0, 0, 0, 0, 0, 0, &res); return res.a0; } /* * v1.4b Section 3.3.1 says: * A return value of greater than 0 means the feature ID is * implemented, and there are other feature-specific * feature or capability bits available in other return value * registers. * And for FEATURE_SELECTOR all defined features return data in other * registers, so 0 is not an allowed return. */ static inline s64 arm_drtm_query_feature(u64 feature, u64 *value) { struct arm_smccc_res res; arm_smccc_1_1_smc(ARM_DRTM_SMC_FEATURES, ARM_DRTM_FEATURE_SELECTOR | FIELD_PREP(ARM_DRTM_FEATURE_ID_MASK, feature), 0, 0, 0, 0, 0, 0, &res); *value = res.a1; return res.a0; } Thanks, Jason