From: Daniel Byrne <daniel1.byrne@intel.com>
To: Vinod Koul <vkoul@kernel.org>, Dave Jiang <dave.jiang@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>, Frank Li <Frank.Li@kernel.org>,
Vinicius Costa Gomes <vinicius.gomes@intel.com>,
Jonathan Corbet <corbet@lwn.net>,
Ludovic Desroches <ludovic.desroches@microchip.com>,
dmaengine@vger.kernel.org, linux-doc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 0/3] [PATCH 0/3] dmaengine: polled completion status for out-of-order providers
Date: Mon, 19 Oct 2026 08:06:29 -0700 [thread overview]
Message-ID: <20261019150632.4026424-1-daniel1.byrne@intel.com> (raw)
A client that polls transaction status on a device whose work queues
complete out of order, as DSA's do when several engines serve one
queue, cannot use the cookie-ordered dma_async_is_tx_complete(): the
completed-cookie watermark moves past descriptors still in flight.
These three patches add dmaengine_async_is_tx_complete() as the polling
API, routing the query to device_tx_status() without the cookie-window
outputs, implement it in idxd from a generation-numbered cookie that
reads the descriptor's own completion record, and drop
DMA_COMPLETION_NO_ORDER and DMA_OUT_OF_ORDER, whose only setter was
idxd. dmatest's polled mode is the in-tree user; the io_uring DMA copy
offload, to be posted separately, is the one that needs the exact answers.
This applies on top of "dmaengine: idxd: fixes found by an in-kernel
polling client", posted alongside, which the status implementation's
reset-epoch handling depends on.
Daniel Byrne (3):
dmaengine: add dmaengine_async_is_tx_complete() for channel status
queries
dmaengine: idxd: generation-number transaction status
dmaengine: drop DMA_COMPLETION_NO_ORDER and DMA_OUT_OF_ORDER
Documentation/driver-api/dmaengine/client.rst | 24 +--
.../driver-api/dmaengine/provider.rst | 64 ++++---
drivers/dma/amba-pl08x.c | 2 +-
drivers/dma/at_hdmac.c | 5 +-
drivers/dma/dmaengine.c | 2 +-
drivers/dma/dmaengine.h | 21 ++-
drivers/dma/dmatest.c | 14 +-
drivers/dma/idxd/device.c | 1 +
drivers/dma/idxd/dma.c | 159 +++++++++++++++++-
drivers/dma/idxd/idxd.h | 3 +
drivers/dma/idxd/irq.c | 8 +
include/linux/dmaengine.h | 55 +++---
12 files changed, 268 insertions(+), 90 deletions(-)
base-commit: c03c1a14507dfaf8b856c2608f9ac216021fc222
prerequisite-patch-id: b50615a6696ce4ffa7e20911f77b9f7f0481f14f
prerequisite-patch-id: 36d833fd556bce04054a7e373ee46575186bb58c
prerequisite-patch-id: 3aeecac097eafb6812e10b9896a242c61c4ca5da
prerequisite-patch-id: 99e0468cdabf56a287c6a7f2d7ef06aa6d5a573e
prerequisite-patch-id: b1dd90551e6b671e751aae8d2a688d9db8f300f5
prerequisite-patch-id: c99a06be81e6a56d84a14bf9e00d2b48455c3a89
prerequisite-patch-id: 3e39b306130b75fedae70a328072dc9577818b9f
prerequisite-patch-id: b1d8fb5b5f7f478adca95f4c8b632480164d18b4
prerequisite-patch-id: b6d48ab83002f113833ba874be299c241788dd30
prerequisite-patch-id: 53bb73bdfd98cd78ca5d86b00ad7e96fcebf7ee6
prerequisite-patch-id: de44e2d44df13e8e07ae00df842d67c9d5c874d2
prerequisite-patch-id: 8191bc0ef2c849d2d9d55f73fc2169f695ea8594
prerequisite-patch-id: bfc55b104522278ca1fba36d3f4adb3a306267bc
prerequisite-patch-id: 12c1f4cba95509b8e7e87ce5c2f9c4265ec0c2df
prerequisite-patch-id: 6e859bfd95e53386bce02ac6585f09a067d0bb8e
prerequisite-patch-id: 2874936c0a5b3863db0309e06ee93008890a714e
prerequisite-patch-id: 85ef17aa68aecd398d3b47ad8df435ce715572e8
--
2.43.0
next reply other threads:[~2026-10-19 15:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-19 15:06 Daniel Byrne [this message]
2026-10-19 15:06 ` [PATCH 1/3] dmaengine: add dmaengine_async_is_tx_complete() for channel status queries Daniel Byrne
2026-10-19 18:36 ` Frank Li
2026-10-19 15:06 ` [PATCH 2/3] dmaengine: idxd: generation-number transaction status Daniel Byrne
2026-10-19 18:53 ` Dave Jiang
2026-10-19 15:06 ` [PATCH 3/3] dmaengine: drop DMA_COMPLETION_NO_ORDER and DMA_OUT_OF_ORDER Daniel Byrne
2026-10-19 19:02 ` Frank Li
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