Re: [PATCH 2/2] Documentation: PCI: Document aer_inject's aer_mask_override parameter

[Priyank Rathod <rathodpriyank@google.com>]

Hi Daniel,

Thank you for reviewing the series and verifying the documentation build
against the implementation!

On Sun, Oct 25, 2026 at 11:19:28AM -0300, Daniel Pereira wrote:
> There is one thing I could not reconcile, in case it is useful. The
> text gives Poisoned TLP Egress Blocked as an example of an error that
> is masked by default. In the sample session of the cover letter,
> PCI_ERR_UNCOR_MASK of the e1000e reads 02400000 before the test, which
> is PCI_ERR_UNC_INTN (0x00400000) plus PCI_ERR_UNC_TLPPRE (0x02000000),
> while PCI_ERR_UNC_POISON_BLK (0x04000000) is clear. The vendor register
> descriptions I found also list that bit with a reset value of 0. The
> Correctable side does match: 0000c000 has Corrected Internal and Header
> Log Overflow set. Internal errors match too, since
> pci_aer_unmask_internal_errors() is only used for CXL.
>
> Perhaps the example could name only errors whose default is confirmed,
> for instance Header Log Overflow and the Internal Errors, or cite the
> spec section if it does say that Poisoned TLP Egress Blocked is masked
> by default. I may well be missing something in the spec.

Per PCIe r7.0, sec 7.8.4.3, Table 7-149, "Uncorrectable Error Mask
Register (Offset 08h)", bit 26 (Poisoned TLP Egress Blocked Mask) has a
default value of 1b (RWS), alongside bit 22 (Uncorrectable Internal
Error Mask, default 1b).

The reason bit 26 reads 0b on the e1000e Endpoint in the cover letter
is Note 3 of Table 7-149: a non-VF Function only implements bit 26 when
Poisoned TLP Egress Blocking Supported is Set in the DPC Capability
Register (Offset 04h, bit 6; PCIe r7.0, sec 7.9.14.2, Table 7-280).
Per PCIe r7.0, sec 7.9.14, the DPC Extended Capability (001Dh) is only
applicable to Root Ports and Switch Downstream Ports, not to Endpoints
like e1000e (and in QEMU, pcie_aer_init() initializes PCI_ERR_UNCOR_MASK
to PCI_ERR_UNC_INTN | PCI_ERR_UNC_TLPPRE = 0x02400000). Per sec 7.8.4.3,
"Register fields for bits not implemented by the Function are hardwired
to 0b."

That said, your suggestion to use "Header Log Overflow or Internal
Errors" (PCIe r7.0, sec 7.8.4.6, Table 7-152, bits 14-15, and
sec 7.8.4.3, Table 7-149, bit 22) as the example is much clearer
because those bits apply to Endpoints as well and match the sample
output directly. If you or anyone else suggests the same, I will gladly
change it.

Thanks,
Priyank