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From: Mario Limonciello <superm1@kernel.org>
To: Huacai Chen <chenhuacai@kernel.org>,
	Geert Uytterhoeven <geert@linux-m68k.org>
Cc: "Borislav Petkov" <bp@alien8.de>,
	"Jean Delvare" <jdelvare@suse.com>,
	"Andi Shyti" <andi.shyti@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Mario Limonciello" <mario.limonciello@amd.com>,
	"Yazen Ghannam" <yazen.ghannam@amd.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
	<x86@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>,
	"Shyam Sundar S K" <Shyam-sundar.S-k@amd.com>,
	"Hans de Goede" <hdegoede@redhat.com>,
	"open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
	"open list" <linux-kernel@vger.kernel.org>,
	"open list:I2C/SMBUS CONTROLLER DRIVERS FOR PC"
	<linux-i2c@vger.kernel.org>,
	"open list:AMD PMC DRIVER" <platform-driver-x86@vger.kernel.org>,
	"Ingo Molnar" <mingo@kernel.org>,
	linux-mips@vger.kernel.org, loongarch@lists.linux.dev
Subject: Re: [PATCH v5 2/5] i2c: piix4: Depends on X86
Date: Tue, 10 Jun 2025 07:12:31 -0700	[thread overview]
Message-ID: <24febda9-6360-459f-82d3-6fba9ed9be83@kernel.org> (raw)
In-Reply-To: <CAAhV-H70LXsDYMA7wz4x828rEFoJsNX0=m8F73Ge9=yfpzBpZQ@mail.gmail.com>

On 6/10/2025 2:24 AM, Huacai Chen wrote:
> On Tue, Jun 10, 2025 at 5:16 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>>
>> Hi Mario,
>>
>> CC mips, loongarch
>>
>> On Wed, 23 Apr 2025 at 01:49, Mario Limonciello <superm1@kernel.org> wrote:
>>> From: Mario Limonciello <mario.limonciello@amd.com>
>>>
>>> PIIX4 and compatible controllers are only for X86. As some headers are
>>> being moved into x86 specific headers PIIX4 won't compile on non-x86.
>>>
>>> Suggested-by: Ingo Molnar <mingo@kernel.org>
>>> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
>>
>> Thanks for your patch, which is now commit 7e173eb82ae97175
>> ("i2c: piix4: Make CONFIG_I2C_PIIX4 dependent on CONFIG_X86")
>> in v6.16-rc1.
>>
>>> --- a/drivers/i2c/busses/Kconfig
>>> +++ b/drivers/i2c/busses/Kconfig
>>> @@ -200,7 +200,7 @@ config I2C_ISMT
>>>
>>>   config I2C_PIIX4
>>>          tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
>>> -       depends on PCI && HAS_IOPORT
>>> +       depends on PCI && HAS_IOPORT && X86
>>
>> Are you sure this south-bridge is not used on non-x86 platforms?
>> It is enabled in several non-x86 defconfigs:
>>
>>      arch/loongarch/configs/loongson3_defconfig:CONFIG_I2C_PIIX4=y
>>      arch/mips/configs/ip27_defconfig:CONFIG_I2C_PIIX4=m
>>      arch/mips/configs/loongson2k_defconfig:CONFIG_I2C_PIIX4=y
>>      arch/mips/configs/loongson3_defconfig:CONFIG_I2C_PIIX4=y
>>
>> The loongarch and loongson entries are probably bogus, but I wouldn't
>> be surprised if the SGI Onyx and Origin do use Intel south-bridges.
> Loongson can use AMD SB700/SB800 south bridges, which have I2C_PIIX4.

Well we could revert this patch, but it's going to be a compile failure 
because of 624b0d5696a89b138408d385899dd35372db324b and other patches 
that go on top of that.

My current leaning is we make a dummy fch.h header for these archs with 
#defines for 0.

Any thoughts?

> 
> Huacai
> 
>>
>>>          select I2C_SMBUS
>>>          help
>>>            If you say yes to this option, support will be included for the Intel
>>
>> Gr{oetje,eeting}s,
>>
>>                          Geert
>>
>> --
>> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>>
>> In personal conversations with technical people, I call myself a hacker. But
>> when I'm talking to journalists I just say "programmer" or something like that.
>>                                  -- Linus Torvalds
>>


  reply	other threads:[~2025-06-10 14:12 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-22 23:48 [PATCH v5 0/5] AMD Zen debugging documentation Mario Limonciello
2025-04-22 23:48 ` [PATCH v5 1/5] Documentation: Add AMD Zen debugging document Mario Limonciello
2025-04-22 23:48 ` [PATCH v5 2/5] i2c: piix4: Depends on X86 Mario Limonciello
2025-04-25 11:18   ` Andi Shyti
2025-04-26  9:42     ` Ingo Molnar
2025-04-28 18:18       ` Andi Shyti
2025-06-10  9:16   ` Geert Uytterhoeven
2025-06-10  9:24     ` Huacai Chen
2025-06-10 14:12       ` Mario Limonciello [this message]
2025-06-10 14:53         ` Hans de Goede
2025-06-10 14:55           ` Hans de Goede
2025-06-10 16:59             ` Geert Uytterhoeven
2025-06-10 18:52               ` Hans de Goede
2025-04-22 23:48 ` [PATCH v5 3/5] i2c: piix4: Move SB800_PIIX4_FCH_PM_ADDR definition to amd/fch.h Mario Limonciello
2025-04-25 11:18   ` Andi Shyti
2025-04-22 23:48 ` [PATCH v5 4/5] platform/x86/amd: pmc: use FCH_PM_BASE definition Mario Limonciello
2025-04-29 14:39   ` Ilpo Järvinen
2025-04-22 23:48 ` [PATCH v5 5/5] x86/CPU/AMD: Print the reason for the last reset Mario Limonciello
2025-04-30 19:03   ` Borislav Petkov
2025-04-30 19:05     ` Mario Limonciello
2025-04-30 19:10       ` Borislav Petkov
2025-04-30 19:17         ` Mario Limonciello
2025-04-30 19:25           ` Borislav Petkov
2025-04-30 19:32             ` Mario Limonciello
2025-04-30 19:38               ` Borislav Petkov
2025-05-01  8:31               ` Borislav Petkov
2025-05-04  6:38                 ` Ingo Molnar
2025-04-23 15:02 ` [PATCH v5 0/5] AMD Zen debugging documentation Jonathan Corbet
2025-04-28 16:14   ` Mario Limonciello
2025-04-24 15:58 ` Ingo Molnar

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