From: Randy Dunlap <rdunlap@infradead.org>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Peter Zijlstra <peterz@infradead.org>,
Ard Biesheuvel <ardb@kernel.org>,
"Paul E. McKenney" <paulmck@kernel.org>,
Josh Poimboeuf <jpoimboe@kernel.org>,
Xiongwei Song <xiongwei.song@windriver.com>,
Xin Li <xin3.li@intel.com>,
"Mike Rapoport (IBM)" <rppt@kernel.org>,
Brijesh Singh <brijesh.singh@amd.com>,
Michael Roth <michael.roth@amd.com>,
Tony Luck <tony.luck@intel.com>,
Alexey Kardashevskiy <aik@amd.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
Sohil Mehta <sohil.mehta@intel.com>,
Ingo Molnar <mingo@kernel.org>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Daniel Sneddon <daniel.sneddon@linux.intel.com>,
Kai Huang <kai.huang@intel.com>,
Sandipan Das <sandipan.das@amd.com>,
Breno Leitao <leitao@debian.org>,
Rick Edgecombe <rick.p.edgecombe@intel.com>,
Alexei Starovoitov <ast@kernel.org>, Hou Tao <houtao1@huawei.com>,
Juergen Gross <jgross@suse.com>,
Vegard Nossum <vegard.nossum@oracle.com>,
Kees Cook <kees@kernel.org>, Eric Biggers <ebiggers@google.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
"Masami Hiramatsu (Google)" <mhiramat@kernel.org>,
Andrew Morton <akpm@linux-foundation.org>,
Luis Chamberlain <mcgrof@kernel.org>,
Yuntao Wang <ytcoode@gmail.com>,
Rasmus Villemoes <linux@rasmusvillemoes.dk>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Tejun Heo <tj@kernel.org>, Changbin Du <changbin.du@huawei.com>,
Huang Shijie <shijie@os.amperecomputing.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Namhyung Kim <namhyung@kernel.org>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-efi@vger.kernel.org, linux-mm@kvack.org,
Yian Chen <yian.chen@intel.com>
Subject: Re: [PATCHv6 01/16] x86/cpu: Enumerate the LASS feature bits
Date: Fri, 20 Jun 2025 09:02:42 -0700 [thread overview]
Message-ID: <25600557-9cd5-406c-9acf-abc163afde2d@infradead.org> (raw)
In-Reply-To: <20250620135325.3300848-2-kirill.shutemov@linux.intel.com>
Hi--
On 6/20/25 6:53 AM, Kirill A. Shutemov wrote:
> From: Sohil Mehta <sohil.mehta@intel.com>
>
> Linear Address Space Separation (LASS) is a security feature that
> intends to prevent malicious virtual address space accesses across
> user/kernel mode.
>
> Such mode based access protection already exists today with paging and
> features such as SMEP and SMAP. However, to enforce these protections,
> the processor must traverse the paging structures in memory. Malicious
> software can use timing information resulting from this traversal to
> determine details about the paging structures, and these details may
> also be used to determine the layout of the kernel memory.
>
> The LASS mechanism provides the same mode-based protections as paging
> but without traversing the paging structures. Because the protections
> enforced by LASS are applied before paging, software will not be able to
> derive paging-based timing information from the various caching
> structures such as the TLBs, mid-level caches, page walker, data caches,
> etc.
>
> LASS enforcement relies on the typical kernel implementation to divide
> the 64-bit virtual address space into two halves:
> Addr[63]=0 -> User address space
> Addr[63]=1 -> Kernel address space
>
> Any data access or code execution across address spaces typically
> results in a #GP fault.
>
> The LASS enforcement for kernel data access is dependent on CR4.SMAP
> being set. The enforcement can be disabled by toggling the RFLAGS.AC bit
> similar to SMAP.
>
> Define the CPU feature bits to enumerate this feature and include
> feature dependencies to reflect the same.
>
> Co-developed-by: Yian Chen <yian.chen@intel.com>
> Signed-off-by: Yian Chen <yian.chen@intel.com>
> Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> ---
> arch/x86/Kconfig.cpufeatures | 4 ++++
> arch/x86/include/asm/cpufeatures.h | 1 +
> arch/x86/include/asm/smap.h | 22 +++++++++++++++++++--
> arch/x86/include/uapi/asm/processor-flags.h | 2 ++
> arch/x86/kernel/cpu/cpuid-deps.c | 1 +
> tools/arch/x86/include/asm/cpufeatures.h | 1 +
> 6 files changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/Kconfig.cpufeatures b/arch/x86/Kconfig.cpufeatures
> index 250c10627ab3..9574c198fc08 100644
> --- a/arch/x86/Kconfig.cpufeatures
> +++ b/arch/x86/Kconfig.cpufeatures
> @@ -124,6 +124,10 @@ config X86_DISABLED_FEATURE_PCID
> def_bool y
> depends on !X86_64
>
> +config X86_DISABLED_FEATURE_LASS
> + def_bool y
> + depends on !X86_64
Please explain why this is !X86_64.
Thanks.
> +
> config X86_DISABLED_FEATURE_PKU
> def_bool y
> depends on !X86_INTEL_MEMORY_PROTECTION_KEYS
--
~Randy
next prev parent reply other threads:[~2025-06-20 16:03 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-20 13:53 [PATCHv6 00/16] x86: Enable Linear Address Space Separation support Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 01/16] x86/cpu: Enumerate the LASS feature bits Kirill A. Shutemov
2025-06-20 15:25 ` Dave Hansen
2025-06-20 15:36 ` Xin Li
2025-06-20 17:31 ` Kirill A. Shutemov
2025-06-20 23:46 ` Xin Li
2025-06-21 0:45 ` H. Peter Anvin
2025-06-21 0:50 ` H. Peter Anvin
2025-06-23 17:40 ` Xin Li
2025-06-24 2:04 ` H. Peter Anvin
2025-06-24 4:57 ` Xin Li
2025-06-24 5:11 ` Xin Li
2025-06-20 16:02 ` Randy Dunlap [this message]
2025-06-20 16:12 ` Xin Li
2025-06-20 16:16 ` Randy Dunlap
2025-06-20 16:35 ` Borislav Petkov
2025-06-20 17:33 ` Kirill A. Shutemov
2025-06-20 18:29 ` Borislav Petkov
2025-06-23 8:17 ` Kirill A. Shutemov
2025-06-23 10:21 ` Borislav Petkov
2025-06-23 13:42 ` Kirill A. Shutemov
2025-06-26 15:18 ` Borislav Petkov
2025-06-26 16:07 ` Borislav Petkov
2025-06-26 17:21 ` Dave Hansen
2025-06-27 10:25 ` Kirill A. Shutemov
2025-06-27 10:43 ` Borislav Petkov
2025-06-27 13:57 ` Dave Hansen
2025-06-20 18:14 ` Sohil Mehta
2025-06-20 18:24 ` Dave Hansen
2025-06-20 23:10 ` Sohil Mehta
2025-06-23 16:25 ` Luck, Tony
2025-06-23 16:42 ` Dave Hansen
2025-06-23 23:13 ` Luck, Tony
2025-06-23 23:36 ` H. Peter Anvin
2025-06-24 0:10 ` Luck, Tony
2025-06-24 2:03 ` H. Peter Anvin
2025-06-25 18:51 ` H. Peter Anvin
2025-06-20 13:53 ` [PATCHv6 02/16] x86/asm: Introduce inline memcpy and memset Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 03/16] x86/alternatives: Disable LASS when patching kernel alternatives Kirill A. Shutemov
2025-06-20 15:33 ` Dave Hansen
2025-06-20 17:18 ` Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 04/16] x86/efi: Move runtime service initialization to arch/x86 Kirill A. Shutemov
2025-06-20 15:35 ` Dave Hansen
2025-06-20 17:42 ` Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 05/16] x86/cpu: Defer CR pinning setup until after EFI initialization Kirill A. Shutemov
2025-06-20 15:44 ` Dave Hansen
2025-06-20 13:53 ` [PATCHv6 06/16] efi: Disable LASS around set_virtual_address_map() EFI call Kirill A. Shutemov
2025-06-20 15:55 ` Dave Hansen
2025-06-20 17:50 ` Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 07/16] x86/vsyscall: Reorganize the #PF emulation code Kirill A. Shutemov
2025-06-20 18:43 ` Dave Hansen
2025-06-20 23:08 ` Andrew Cooper
2025-06-20 23:18 ` Sohil Mehta
2025-06-20 23:29 ` Andrew Cooper
2025-06-20 23:21 ` Dave Hansen
2025-06-21 3:35 ` H. Peter Anvin
2025-06-23 12:41 ` Kirill A. Shutemov
2025-06-23 12:46 ` Andrew Cooper
2025-06-23 15:32 ` Dave Hansen
2025-06-23 15:45 ` Andrew Cooper
2025-06-24 11:37 ` Kirill A. Shutemov
2025-06-24 14:11 ` Dave Hansen
2025-06-24 14:59 ` [PATCH] x86/vsyscall: Do not require X86_PF_INSTR to emulate vsyscall Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 08/16] x86/traps: Consolidate user fixups in exc_general_protection() Kirill A. Shutemov
2025-06-20 14:47 ` Dave Hansen
2025-06-20 13:53 ` [PATCHv6 09/16] x86/vsyscall: Add vsyscall emulation for #GP Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 10/16] x86/vsyscall: Disable LASS if vsyscall mode is set to EMULATE Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 11/16] x86/cpu: Set LASS CR4 bit as pinning sensitive Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 12/16] x86/traps: Communicate a LASS violation in #GP message Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 13/16] x86/traps: Handle LASS thrown #SS Kirill A. Shutemov
2025-06-20 15:20 ` Xin Li
2025-06-20 17:53 ` Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 14/16] x86/cpu: Make LAM depend on LASS Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 15/16] x86/cpu: Enable LASS during CPU initialization Kirill A. Shutemov
2025-06-20 13:53 ` [PATCHv6 16/16] x86: Re-enable Linear Address Masking Kirill A. Shutemov
2025-06-20 15:38 ` [PATCHv6 00/16] x86: Enable Linear Address Space Separation support Dave Hansen
2025-06-20 22:04 ` Andrew Cooper
2025-06-20 22:29 ` H. Peter Anvin
2025-06-20 22:43 ` H. Peter Anvin
2025-06-20 22:46 ` Dave Hansen
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