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From: Bagas Sanjaya <bagasdotme@gmail.com>
To: adrian.ho.yin.ng@intel.com, Moritz Fischer <mdf@kernel.org>,
	Wu Hao <hao.wu@intel.com>, Xu Yilun <yilun.xu@intel.com>,
	Tom Rix <trix@redhat.com>, Jonathan Corbet <corbet@lwn.net>
Cc: linux-fpga@vger.kernel.org, linux-doc@vger.kernel.org,
	Alan Tull <atull@opensource.altera.com>
Subject: Re: [PATCH 2/3] fpga: doc: documentation for FPGA debugfs
Date: Thu, 19 May 2022 15:03:20 +0700	[thread overview]
Message-ID: <3a5e3080-c1ab-a5c9-f9e7-355975fadc49@gmail.com> (raw)
In-Reply-To: <20220517084136.3529-1-adrian.ho.yin.ng@intel.com>

On 5/17/22 15:41, adrian.ho.yin.ng@intel.com wrote:
> diff --git a/Documentation/fpga/debugfs.txt b/Documentation/fpga/debugfs.txt
> new file mode 100644
> index 000000000000..1b34d5460d5d
> --- /dev/null
> +++ b/Documentation/fpga/debugfs.txt
> @@ -0,0 +1,33 @@
> +FPGA Manager DebugFS interface for FPGA reprogramming.
> +
> +Alan Tull 2016
> +

Missing (c).

> +Each FPGA gets its own directory such as <debugfs>/fpga_manager/fpga0 and
> +three files:
> +
> + - [RW] flags:          flags as defined in fpga-mgr.h.  For example:
> +
> +   $ echo 1 > /sys/kernel/debug/fpga_manager/fpga0/flags
> +
> + - [RW] firmware_name:  Name of an FPGA image firmware file.  Writing initiates
> +                        a complete FPGA programming cycle.  Note that the image
> +                        file must be in a directory on the firmware search path
> +                        such as /lib/firmware.
> +
> +   $ echo image.rbf > /sys/kernel/debug/fpga_manager/fpga0/firmware_name
> +
> + - [WO] image:          Raw FPGA image data.  Writing the FPGA image data will
> +                        initiate a complete FPGA programming cycle.  Data must
> +                        be written in one chunk, for example:
> +
> +   $ dd bs=10M if=./image.rbf of=/sys/kernel/debug/fpga_manager/fpga0/image
> +    (where image.rbf < 10M)
> +
> +To program the FPGA, write the flags (if needed), then use either the
> +firmware_name or image file to program.
> +
> +This interface does not handle bridges or loading/unloading of soft IP device
> +drivers.  This makes it really easy to mess things up by doing things like
> +reprogramming the hardware out from under a driver or reprogramming while a
> +bridge is enabled, causing gunk to go out on a cpu bus.  It should go without
> +saying that this interface is for debug only.  Not intended for production use.

Use .rst for writing docs in Documentation/ (and fix any warnings found).

-- 
An old man doll... just what I always wanted! - Clara

      parent reply	other threads:[~2022-05-19  8:03 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-17  8:41 [PATCH 2/3] fpga: doc: documentation for FPGA debugfs adrian.ho.yin.ng
2022-05-17 13:20 ` Jonathan Corbet
2022-05-19  8:03 ` Bagas Sanjaya [this message]

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