From: Babu Moger <babu.moger@amd.com>
To: <corbet@lwn.net>, <tony.luck@intel.com>,
<reinette.chatre@intel.com>, <Dave.Martin@arm.com>,
<james.morse@arm.com>, <tglx@linutronix.de>, <mingo@redhat.com>,
<bp@alien8.de>, <dave.hansen@linux.intel.com>
Cc: <x86@kernel.org>, <hpa@zytor.com>, <akpm@linux-foundation.org>,
<paulmck@kernel.org>, <rostedt@goodmis.org>,
<Neeraj.Upadhyay@amd.com>, <david@redhat.com>, <arnd@arndb.de>,
<fvdl@google.com>, <seanjc@google.com>, <thomas.lendacky@amd.com>,
<pawan.kumar.gupta@linux.intel.com>, <babu.moger@amd.com>,
<yosry.ahmed@linux.dev>, <sohil.mehta@intel.com>, <xin@zytor.com>,
<kai.huang@intel.com>, <xiaoyao.li@intel.com>,
<peterz@infradead.org>, <me@mixaill.net>,
<mario.limonciello@amd.com>, <xin3.li@intel.com>,
<ebiggers@google.com>, <ak@linux.intel.com>,
<chang.seok.bae@intel.com>, <andrew.cooper3@citrix.com>,
<perry.yuan@amd.com>, <linux-doc@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <manali.shukla@amd.com>,
<gautham.shenoy@amd.com>
Subject: [PATCH v8 04/10] x86,fs/resctrl: Implement "io_alloc" enable/disable handlers
Date: Tue, 5 Aug 2025 18:30:24 -0500 [thread overview]
Message-ID: <40ffabb62f9f36aae6a8dc26e5f2e376a3dee23a.1754436586.git.babu.moger@amd.com> (raw)
In-Reply-To: <cover.1754436586.git.babu.moger@amd.com>
"io_alloc" enables direct insertion of data from I/O devices into the
cache.
On AMD systems, "io_alloc" feature is backed by L3 Smart Data Cache
Injection Allocation Enforcement (SDCIAE). Change SDCIAE state by setting
(to enable) or clearing (to disable) bit 1 of MSR L3_QOS_EXT_CFG on all
logical processors within the cache domain.
Introduce architecture-specific call to enable and disable the feature.
The SDCIAE feature details are available in APM listed below [1].
[1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
Publication # 24593 Revision 3.41 section 19.4.7 L3 Smart Data Cache
Injection Allocation Enforcement (SDCIAE)
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Babu Moger <babu.moger@amd.com>
---
v8: Moved resctrl_arch_io_alloc_enable() and its dependancies to
arch/x86/kernel/cpu/resctrl/ctrlmondata.c file.
v7: Removed the inline for resctrl_arch_get_io_alloc_enabled().
Update code comment in resctrl.h.
Changed the subject to x86,fs/resctrl.
v6: Added lockdep_assert_cpus_held() in _resctrl_sdciae_enable() to protect
r->ctrl_domains.
Added more comments in include/linux/resctrl.h.
v5: Resolved conflicts due to recent resctrl FS/ARCH code restructure.
The files monitor.c/rdtgroup.c have been split between FS and ARCH directories.
Moved prototypes of resctrl_arch_io_alloc_enable() and
resctrl_arch_get_io_alloc_enabled() to include/linux/resctrl.h.
v4: Updated the commit log to address the feedback.
v3: Passed the struct rdt_resource to resctrl_arch_get_io_alloc_enabled() instead of resource id.
Renamed the _resctrl_io_alloc_enable() to _resctrl_sdciae_enable() as it is arch specific.
Changed the return to void in _resctrl_sdciae_enable() instead of int.
Added more context in commit log and fixed few typos.
v2: Renamed the functions to simplify the code.
Renamed sdciae_capable to io_alloc_capable.
Changed the name of few arch functions similar to ABMC series.
resctrl_arch_get_io_alloc_enabled()
resctrl_arch_io_alloc_enable()
---
arch/x86/include/asm/msr-index.h | 1 +
arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 40 +++++++++++++++++++++++
arch/x86/kernel/cpu/resctrl/internal.h | 5 +++
include/linux/resctrl.h | 21 ++++++++++++
4 files changed, 67 insertions(+)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 7490bb5c0776..c998cf0e1375 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1222,6 +1222,7 @@
/* - AMD: */
#define MSR_IA32_MBA_BW_BASE 0xc0000200
#define MSR_IA32_SMBA_BW_BASE 0xc0000280
+#define MSR_IA32_L3_QOS_EXT_CFG 0xc00003ff
#define MSR_IA32_EVT_CFG_BASE 0xc0000400
/* AMD-V MSRs */
diff --git a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
index 1189c0df4ad7..85b6bd6bfb81 100644
--- a/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
+++ b/arch/x86/kernel/cpu/resctrl/ctrlmondata.c
@@ -91,3 +91,43 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d,
return hw_dom->ctrl_val[idx];
}
+
+bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r)
+{
+ return resctrl_to_arch_res(r)->sdciae_enabled;
+}
+
+static void resctrl_sdciae_set_one_amd(void *arg)
+{
+ bool *enable = arg;
+
+ if (*enable)
+ msr_set_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT);
+ else
+ msr_clear_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT);
+}
+
+static void _resctrl_sdciae_enable(struct rdt_resource *r, bool enable)
+{
+ struct rdt_ctrl_domain *d;
+
+ /* Walking r->ctrl_domains, ensure it can't race with cpuhp */
+ lockdep_assert_cpus_held();
+
+ /* Update L3_QOS_EXT_CFG MSR on all the CPUs in all domains */
+ list_for_each_entry(d, &r->ctrl_domains, hdr.list)
+ on_each_cpu_mask(&d->hdr.cpu_mask, resctrl_sdciae_set_one_amd, &enable, 1);
+}
+
+int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable)
+{
+ struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
+
+ if (hw_res->r_resctrl.cache.io_alloc_capable &&
+ hw_res->sdciae_enabled != enable) {
+ _resctrl_sdciae_enable(r, enable);
+ hw_res->sdciae_enabled = enable;
+ }
+
+ return 0;
+}
diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
index 5e3c41b36437..70f5317f1ce4 100644
--- a/arch/x86/kernel/cpu/resctrl/internal.h
+++ b/arch/x86/kernel/cpu/resctrl/internal.h
@@ -37,6 +37,9 @@ struct arch_mbm_state {
u64 prev_msr;
};
+/* Setting bit 1 in L3_QOS_EXT_CFG enables the SDCIAE feature. */
+#define SDCIAE_ENABLE_BIT 1
+
/**
* struct rdt_hw_ctrl_domain - Arch private attributes of a set of CPUs that share
* a resource for a control function
@@ -102,6 +105,7 @@ struct msr_param {
* @mon_scale: cqm counter * mon_scale = occupancy in bytes
* @mbm_width: Monitor width, to detect and correct for overflow.
* @cdp_enabled: CDP state of this resource
+ * @sdciae_enabled: SDCIAE feature (backing "io_alloc") is enabled.
*
* Members of this structure are either private to the architecture
* e.g. mbm_width, or accessed via helpers that provide abstraction. e.g.
@@ -115,6 +119,7 @@ struct rdt_hw_resource {
unsigned int mon_scale;
unsigned int mbm_width;
bool cdp_enabled;
+ bool sdciae_enabled;
};
static inline struct rdt_hw_resource *resctrl_to_arch_res(struct rdt_resource *r)
diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h
index 010f238843b2..d98933ce77af 100644
--- a/include/linux/resctrl.h
+++ b/include/linux/resctrl.h
@@ -531,6 +531,27 @@ void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_mon_domain *
*/
void resctrl_arch_reset_all_ctrls(struct rdt_resource *r);
+/**
+ * resctrl_arch_io_alloc_enable() - Enable/disable io_alloc feature.
+ * @r: The resctrl resource.
+ * @enable: Enable (true) or disable (false) io_alloc on resource @r.
+ *
+ * This can be called from any CPU.
+ *
+ * Return:
+ * 0 on success, <0 on error.
+ */
+int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable);
+
+/**
+ * resctrl_arch_get_io_alloc_enabled() - Get io_alloc feature state.
+ * @r: The resctrl resource.
+ *
+ * Return:
+ * true if io_alloc is enabled or false if disabled.
+ */
+bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r);
+
extern unsigned int resctrl_rmid_realloc_threshold;
extern unsigned int resctrl_rmid_realloc_limit;
--
2.34.1
next prev parent reply other threads:[~2025-08-05 23:31 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-05 23:30 [PATCH v8 00/10] x86,fs/resctrl: Support L3 Smart Data Cache Injection Allocation Enforcement (SDCIAE) Babu Moger
2025-08-05 23:30 ` [PATCH v8 01/10] x86/cpufeatures: Add support for L3 Smart Data Cache Injection Allocation Enforcement Babu Moger
2025-08-05 23:30 ` [PATCH v8 02/10] x86/resctrl: Add SDCIAE feature in the command line options Babu Moger
2025-08-08 1:44 ` Reinette Chatre
2025-08-22 22:07 ` Moger, Babu
2025-08-05 23:30 ` [PATCH v8 03/10] x86,fs/resctrl: Detect io_alloc feature Babu Moger
2025-08-05 23:30 ` Babu Moger [this message]
2025-08-08 1:47 ` [PATCH v8 04/10] x86,fs/resctrl: Implement "io_alloc" enable/disable handlers Reinette Chatre
2025-08-22 22:10 ` Moger, Babu
2025-08-05 23:30 ` [PATCH v8 05/10] fs/resctrl: Introduce interface to display "io_alloc" support Babu Moger
2025-08-08 1:48 ` Reinette Chatre
2025-08-22 22:12 ` Moger, Babu
2025-08-05 23:30 ` [PATCH v8 06/10] fs/resctrl: Add user interface to enable/disable io_alloc feature Babu Moger
2025-08-08 1:49 ` Reinette Chatre
2025-08-22 22:53 ` Moger, Babu
2025-08-27 20:39 ` Moger, Babu
2025-08-29 2:47 ` Reinette Chatre
2025-09-02 16:20 ` Moger, Babu
2025-08-21 5:02 ` Gautham R. Shenoy
2025-08-22 23:10 ` Moger, Babu
2025-08-05 23:30 ` [PATCH v8 07/10] fs/resctrl: Introduce interface to display io_alloc CBMs Babu Moger
2025-08-08 1:51 ` Reinette Chatre
2025-08-26 18:33 ` Moger, Babu
2025-08-05 23:30 ` [PATCH v8 08/10] fs/resctrl: Modify rdt_parse_data to pass mode and CLOSID Babu Moger
2025-08-08 1:52 ` Reinette Chatre
2025-08-26 18:40 ` Moger, Babu
2025-08-05 23:30 ` [PATCH v8 09/10] fs/resctrl: Introduce interface to modify io_alloc Capacity Bit Masks Babu Moger
2025-08-08 1:53 ` Reinette Chatre
2025-08-26 18:53 ` Moger, Babu
2025-08-05 23:30 ` [PATCH v8 10/10] fs/resctrl: Update bit_usage to reflect io_alloc Babu Moger
2025-08-08 1:54 ` Reinette Chatre
2025-08-26 22:51 ` Moger, Babu
2025-08-29 3:11 ` Reinette Chatre
2025-09-02 16:32 ` Moger, Babu
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