From: "David E. Box" <david.e.box@linux.intel.com>
To: Greg KH <gregkh@linuxfoundation.org>
Cc: lee.jones@linaro.org, hdegoede@redhat.com,
mgross@linux.intel.com, bhelgaas@google.com,
andriy.shevchenko@linux.intel.com, srinivas.pandruvada@intel.com,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
platform-driver-x86@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH 5/5] platform/x86: Add Intel Software Defined Silicon driver
Date: Fri, 01 Oct 2021 04:13:58 -0700 [thread overview]
Message-ID: <45b6454a3421ac064dff3ba159e02985d3e55440.camel@linux.intel.com> (raw)
In-Reply-To: <YVa46eU1VX7CM+Xd@kroah.com>
On Fri, 2021-10-01 at 09:29 +0200, Greg KH wrote:
> On Thu, Sep 30, 2021 at 06:28:15PM -0700, David E. Box wrote:
> > +static long sdsi_device_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
> > +{
> > + struct miscdevice *miscdev = file->private_data;
> > + struct sdsi_priv *priv = to_sdsi_priv(miscdev);
> > + void __user *argp = (void __user *)arg;
> > + long ret = -EINVAL;
> > +
> > + if (!priv->dev_present)
> > + return -ENODEV;
> > +
> > + if (!priv->sdsi_enabled)
> > + return -EPERM;
> > +
> > + if (cmd == SDSI_IF_READ_STATE)
> > + return sdsi_if_read_state_cert(priv, argp);
> > +
> > + mutex_lock(&priv->akc_lock);
> > + switch (cmd) {
> > + case SDSI_IF_PROVISION_AKC:
> > + /*
> > + * While writing an authentication certificate disallow other openers
> > + * from using AKC or CAP.
> > + */
> > + if (!priv->akc_owner)
> > + priv->akc_owner = file;
> > +
> > + if (priv->akc_owner != file) {
>
> Please explain how this test would ever trigger and how you tested it?
>
> What exactly are you trying to protect from here? If userspace has your
> file descriptor, it can do whatever it wants, don't try to be smarter
> than it as you will never win.
>
> And why are you using ioctls at all here? As you are just
> reading/writing to the hardware directly, why not just use a binary
> sysfs file to be that pipe? What requires an ioctl at all?
So an original internal version of this did use binary attributes. But there was concern during
review that a flow, particularly when doing the two write operations, could not be handled
atomically while exposed as separate files. Above is the attempt to handle the situation in the
ioctl. That is, whichever opener performs AKC write first would lock out all other openers from
performing any write until that file is closed. This is to avoid interfering with that process,
should the opener also decide to perform a CAP operation.
There may be future commands requiring RW ioctls as well.
David
>
> thanks,
>
> greg k-h
next prev parent reply other threads:[~2021-10-01 11:14 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-01 1:28 [PATCH 0/5] Move intel_pm from MFD to Auxiliary bus David E. Box
2021-10-01 1:28 ` [PATCH 1/5] PCI: Add #defines for accessing PCIe DVSEC fields David E. Box
2021-10-01 1:28 ` [PATCH 2/5] platform/x86/intel: Move intel_pmt from MFD to Auxiliary Bus David E. Box
2021-10-06 8:58 ` Leon Romanovsky
2021-10-06 20:58 ` David E. Box
2021-10-10 6:59 ` Leon Romanovsky
2021-11-14 1:56 ` kernel test robot
2021-10-01 1:28 ` [PATCH 3/5] platform/x86/intel: extended_caps: Add support for PCIe VSEC structures David E. Box
2021-10-01 1:28 ` [PATCH 4/5] Documentation: Update ioctl-number.rst for Intel Software Defined Silicon interface David E. Box
2021-10-01 1:28 ` [PATCH 5/5] platform/x86: Add Intel Software Defined Silicon driver David E. Box
2021-10-01 7:14 ` Greg KH
2021-10-01 10:38 ` David E. Box
2021-10-01 11:29 ` Greg KH
2021-10-01 7:15 ` Greg KH
2021-10-01 7:16 ` Greg KH
2021-10-01 10:47 ` David E. Box
2021-10-01 11:27 ` Greg KH
2021-10-01 7:29 ` Greg KH
2021-10-01 11:13 ` David E. Box [this message]
2021-10-01 11:26 ` Greg KH
2021-10-01 20:43 ` David E. Box
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