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Tue, 11 Mar 2025 05:11:21 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 52B5BLuK025078 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 11 Mar 2025 05:11:21 GMT Received: from [10.151.36.43] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 10 Mar 2025 22:11:16 -0700 Message-ID: <775e7801-c84b-e8a4-032d-1c3b6cb6bf25@quicinc.com> Date: Tue, 11 Mar 2025 10:41:04 +0530 Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v6 02/12] dmaengine: add DMA_PREP_LOCK and DMA_PREP_UNLOCK flag To: Vinod Koul CC: , , , , , , , , , , , , , , References: <20250115103004.3350561-1-quic_mdalam@quicinc.com> <20250115103004.3350561-3-quic_mdalam@quicinc.com> Content-Language: en-US From: Md Sadre Alam In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: LxT-zZ1a_60qL6PEp8hQtGoVs5zRprSX X-Authority-Analysis: v=2.4 cv=fvgmZE4f c=1 sm=1 tr=0 ts=67cfc5f9 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=VwQbUJbxAAAA:8 a=COk6AnOGAAAA:8 a=zkCprTptnbEQjy2woTsA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: LxT-zZ1a_60qL6PEp8hQtGoVs5zRprSX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-11_01,2025-03-07_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 mlxlogscore=999 suspectscore=0 phishscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 mlxscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2503110033 On 3/11/2025 2:06 AM, Vinod Koul wrote: > On 15-01-25, 15:59, Md Sadre Alam wrote: >> Add lock and unlock flag support on command descriptor. >> Once lock set in requester pipe, then the bam controller >> will lock all others pipe and process the request only >> from requester pipe. Unlocking only can be performed from >> the same pipe. >> >> If DMA_PREP_LOCK flag passed in command descriptor then requester >> of this transaction wanted to lock the BAM controller for this >> transaction so BAM driver should set LOCK bit for the HW descriptor. >> >> If DMA_PREP_UNLOCK flag passed in command descriptor then requester >> of this transaction wanted to unlock the BAM controller.so BAM driver >> should set UNLOCK bit for the HW descriptor. >> >> BAM IP version 1.4.0 and above only supports this LOCK/UNLOCK >> feature. > > Have you aligned internally b/w team at Qualcomm to have this as single > approach for LOCK implementation. I would like to see ack from > Mukesh/Bjorn before proceeding ahead with this I have already discuss this internally with Mukesh and he has posted his response here [1] [1] https://lore.kernel.org/all/1566eafb-7286-4f27-922d-0bbaaab8120b@quicinc.com/ > >> >> Signed-off-by: Md Sadre Alam >> --- >> >> Change in [v6] >> >> * Change "BAM" to "DAM" >> >> Change in [v5] >> >> * Added DMA_PREP_LOCK and DMA_PREP_UNLOCK flag support >> >> Change in [v4] >> >> * This patch was not included in v4 >> >> Change in [v3] >> >> * This patch was not included in v3 >> >> Change in [v2] >> >> * This patch was not included in v2 >> >> Change in [v1] >> >> * This patch was not included in v1 >> >> Documentation/driver-api/dmaengine/provider.rst | 15 +++++++++++++++ >> include/linux/dmaengine.h | 6 ++++++ >> 2 files changed, 21 insertions(+) >> >> diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst >> index 3085f8b460fa..a032e55d0a4f 100644 >> --- a/Documentation/driver-api/dmaengine/provider.rst >> +++ b/Documentation/driver-api/dmaengine/provider.rst >> @@ -628,6 +628,21 @@ DMA_CTRL_REUSE >> - This flag is only supported if the channel reports the DMA_LOAD_EOT >> capability. >> >> +- DMA_PREP_LOCK >> + >> + - If set, the DMA will lock all other pipes not related to the current >> + pipe group, and keep handling the current pipe only. >> + >> + - All pipes not within this group will be locked by this pipe upon lock >> + event. >> + >> + - only pipes which are in the same group and relate to the same Environment >> + Execution(EE) will not be locked by a certain pipe. >> + >> +- DMA_PREP_UNLOCK >> + >> + - If set, DMA will release all locked pipes >> + >> General Design Notes >> ==================== >> >> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h >> index 346251bf1026..8ebd43a998a7 100644 >> --- a/include/linux/dmaengine.h >> +++ b/include/linux/dmaengine.h >> @@ -200,6 +200,10 @@ struct dma_vec { >> * transaction is marked with DMA_PREP_REPEAT will cause the new transaction >> * to never be processed and stay in the issued queue forever. The flag is >> * ignored if the previous transaction is not a repeated transaction. >> + * @DMA_PREP_LOCK: tell the driver that there is a lock bit set on command >> + * descriptor. >> + * @DMA_PREP_UNLOCK: tell the driver that there is a un-lock bit set on command >> + * descriptor. >> */ >> enum dma_ctrl_flags { >> DMA_PREP_INTERRUPT = (1 << 0), >> @@ -212,6 +216,8 @@ enum dma_ctrl_flags { >> DMA_PREP_CMD = (1 << 7), >> DMA_PREP_REPEAT = (1 << 8), >> DMA_PREP_LOAD_EOT = (1 << 9), >> + DMA_PREP_LOCK = (1 << 10), >> + DMA_PREP_UNLOCK = (1 << 11), >> }; >> >> /** >> -- >> 2.34.1 >