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([2001:a61:341e:1201:c434:b5b1:98a6:efed]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42d9b1899efsm26262915e9.30.2024.09.13.06.46.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2024 06:46:18 -0700 (PDT) Message-ID: <84961c1f857dfc8498c41ac97235a037111ed6d5.camel@gmail.com> Subject: Re: [PATCH 4/6] iio: adc: ad4030: add support for ad4630-24 and ad4630-16 From: Nuno =?ISO-8859-1?Q?S=E1?= To: Esteban Blanc , Jonathan Cameron Cc: Lars-Peter Clausen , Michael Hennerich , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nuno Sa , Jonathan Corbet , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner , linux-doc@vger.kernel.org Date: Fri, 13 Sep 2024 15:46:17 +0200 In-Reply-To: References: <20240822-eblanc-ad4630_v1-v1-0-5c68f3327fdd@baylibre.com> <20240822-eblanc-ad4630_v1-v1-4-5c68f3327fdd@baylibre.com> <20240826102748.4be0b642@jic23-huawei> <0a4e7fe39cf36774b28c86f6baab5ef8c20e3d6b.camel@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.4 (3.52.4-1.fc40) Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2024-09-13 at 12:55 +0000, Esteban Blanc wrote: > On Fri Sep 13, 2024 at 10:18 AM UTC, Nuno S=C3=A1 wrote: > > On Fri, 2024-09-13 at 09:55 +0000, Esteban Blanc wrote: > > > On Mon Aug 26, 2024 at 9:27 AM UTC, Jonathan Cameron wrote: > > > > On Thu, 22 Aug 2024 14:45:20 +0200 > > > > Esteban Blanc wrote: > > > > > +static const unsigned long ad4630_channel_masks[] =3D { > > > > > + /* Differential only */ > > > > > + BIT(0) | BIT(2), > > > > > + /* Differential with common byte */ > > > > > + GENMASK(3, 0), > > > > The packing of data isn't going to be good. How bad to shuffle > > > > to put the two small channels next to each other? > > > > Seems like it means you will want to combine your deinterleave > > > > and channel specific handling above, which is a bit fiddly but > > > > not much worse than current code. > > >=20 > > > I can do it since that was what I had done in the RFC in the first pl= ace. > > > Nuno asked for in this email > > > https://lore.kernel.org/r/0036d44542f8cf45c91c867f0ddd7b45d1904d6b.ca= mel@gmail.com/ > > > : > > >=20 > > > > > > * You're pushing the CM channels into the end. So when we a 2 c= hannel > > > > > > device > > > > > > we'll have: > > >=20 > > > > > > in_voltage0 - diff > > > > > > in_voltage1 - diff > > > > > > in_voltage2 - CM associated with chan0 > > > > > > in_voltage0 - CM associated with chan1 > > > > > >=20 > > > > > > I think we could make it so the CM channel comes right after th= e channel > > > > > > where > > > > > > it's data belongs too. So for example, odd channels would be CM= channels > > > > > > (and > > > > > > labels could also make sense). > > >=20 > > > So that's what I did here :D > > >=20 > > > For the software side off things here it doesn't change a lot of thin= gs > > > since we have to manipulate the data anyway, putting the extra byte a= t the > > > end or in between is no extra work. > > > For the offload engine however, it should be easier to ask for 24 bit= s > > > then 8 bits for each channel as it would return two u32 per "hardware > > > channel". > > >=20 > > > In order to avoid having two different layouts, I was kind of sold by > > > Nuno's idea of having the CM in between each diff channel. > > >=20 > >=20 > > Tbh, I was not even thinking about the layout when I proposed the arran= gement. > > Just > > made sense to me (from a logical point of view) to have them together a= s they > > relate > > to the same physical channel. FWIW, we're also speaking bytes in here s= o not sure > > if > > it's that important (or bad). >=20 > The best we can do (if we managed to do it HDL wise) is to reorder the > data to get both CM byte in a single u32 after the 2 u32 of both diff > channel. That would be 3 u32 instead of 4. >=20 We are starting to see more and more devices that do stuff like this. Have = one physical channel that reflects in more than one IIO channel. For SW bufferi= ng it's not really a big deal but for HW buffering it's not ideal.=20 I feel that at some point we should think about having a way to map a chann= el scan element (being kind of a virtual scan element) into the storage_bits of ano= ther one. So in this case, one sample (for one channel) would be the 32bits and thing= s should work the same either in SW or HW buffering. That said, it's probably easier said than done in practice :) - Nuno S=C3=A1