* [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains
@ 2024-08-13 8:54 Tianyang Zhang
2024-08-14 10:41 ` Thomas Gleixner
0 siblings, 1 reply; 7+ messages in thread
From: Tianyang Zhang @ 2024-08-13 8:54 UTC (permalink / raw)
To: corbet, alexs, chenhuacai, kernel, tglx, jiaxun.yang, gaoliang,
wangliupu, lvjianmin, zhangtianyang, yijun, mhocko, akpm,
dianders, maobibo, xry111, zhaotianrui, nathan, yangtiezhu,
zhoubinbin
Cc: loongarch, linux-doc, linux-kernel, Huacai Chen
From: Huacai Chen <chenhuacai@loongson.cn>
Now remove the global PCI/MSI irqdomain implementation and provide the
required MSI parent functionality by filling in msi_parent_ops, so the
PCI/MSI code can detect the new parent and setup per-device MSI domains.
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn>
---
drivers/irqchip/Kconfig | 1 +
drivers/irqchip/irq-loongson-pch-msi.c | 58 ++++++++++----------------
2 files changed, 24 insertions(+), 35 deletions(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index d078bdc48c38..341cd9ca5a05 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -685,6 +685,7 @@ config LOONGSON_PCH_MSI
depends on PCI
default MACH_LOONGSON64
select IRQ_DOMAIN_HIERARCHY
+ select IRQ_MSI_LIB
select PCI_MSI
help
Support for the Loongson PCH MSI Controller.
diff --git a/drivers/irqchip/irq-loongson-pch-msi.c b/drivers/irqchip/irq-loongson-pch-msi.c
index dd4d699170f4..2242f63c66fc 100644
--- a/drivers/irqchip/irq-loongson-pch-msi.c
+++ b/drivers/irqchip/irq-loongson-pch-msi.c
@@ -15,6 +15,8 @@
#include <linux/pci.h>
#include <linux/slab.h>
+#include "irq-msi-lib.h"
+
static int nr_pics;
struct pch_msi_data {
@@ -27,26 +29,6 @@ struct pch_msi_data {
static struct fwnode_handle *pch_msi_handle[MAX_IO_PICS];
-static void pch_msi_mask_msi_irq(struct irq_data *d)
-{
- pci_msi_mask_irq(d);
- irq_chip_mask_parent(d);
-}
-
-static void pch_msi_unmask_msi_irq(struct irq_data *d)
-{
- irq_chip_unmask_parent(d);
- pci_msi_unmask_irq(d);
-}
-
-static struct irq_chip pch_msi_irq_chip = {
- .name = "PCH PCI MSI",
- .irq_mask = pch_msi_mask_msi_irq,
- .irq_unmask = pch_msi_unmask_msi_irq,
- .irq_ack = irq_chip_ack_parent,
- .irq_set_affinity = irq_chip_set_affinity_parent,
-};
-
static int pch_msi_allocate_hwirq(struct pch_msi_data *priv, int num_req)
{
int first;
@@ -85,12 +67,6 @@ static void pch_msi_compose_msi_msg(struct irq_data *data,
msg->data = data->hwirq;
}
-static struct msi_domain_info pch_msi_domain_info = {
- .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
- MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
- .chip = &pch_msi_irq_chip,
-};
-
static struct irq_chip middle_irq_chip = {
.name = "PCH MSI",
.irq_mask = irq_chip_mask_parent,
@@ -155,13 +131,31 @@ static void pch_msi_middle_domain_free(struct irq_domain *domain,
static const struct irq_domain_ops pch_msi_middle_domain_ops = {
.alloc = pch_msi_middle_domain_alloc,
.free = pch_msi_middle_domain_free,
+ .select = msi_lib_irq_domain_select,
+};
+
+#define PCH_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
+ MSI_FLAG_USE_DEF_CHIP_OPS | \
+ MSI_FLAG_PCI_MSI_MASK_PARENT)
+
+#define PCH_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \
+ MSI_FLAG_PCI_MSIX | \
+ MSI_FLAG_MULTI_PCI_MSI)
+
+static struct msi_parent_ops pch_msi_parent_ops = {
+ .required_flags = PCH_MSI_FLAGS_REQUIRED,
+ .supported_flags = PCH_MSI_FLAGS_SUPPORTED,
+ .bus_select_mask = MATCH_PCI_MSI,
+ .bus_select_token = DOMAIN_BUS_NEXUS,
+ .prefix = "PCH-",
+ .init_dev_msi_info = msi_lib_init_dev_msi_info,
};
static int pch_msi_init_domains(struct pch_msi_data *priv,
struct irq_domain *parent,
struct fwnode_handle *domain_handle)
{
- struct irq_domain *middle_domain, *msi_domain;
+ struct irq_domain *middle_domain;
middle_domain = irq_domain_create_hierarchy(parent, 0, priv->num_irqs,
domain_handle,
@@ -174,14 +168,8 @@ static int pch_msi_init_domains(struct pch_msi_data *priv,
irq_domain_update_bus_token(middle_domain, DOMAIN_BUS_NEXUS);
- msi_domain = pci_msi_create_irq_domain(domain_handle,
- &pch_msi_domain_info,
- middle_domain);
- if (!msi_domain) {
- pr_err("Failed to create PCI MSI domain\n");
- irq_domain_remove(middle_domain);
- return -ENOMEM;
- }
+ middle_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
+ middle_domain->msi_parent_ops = &pch_msi_parent_ops;
return 0;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains
2024-08-13 8:54 [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains Tianyang Zhang
@ 2024-08-14 10:41 ` Thomas Gleixner
2024-08-15 1:13 ` Tianyang Zhang
0 siblings, 1 reply; 7+ messages in thread
From: Thomas Gleixner @ 2024-08-14 10:41 UTC (permalink / raw)
To: Tianyang Zhang, corbet, alexs, chenhuacai, kernel, jiaxun.yang,
gaoliang, wangliupu, lvjianmin, zhangtianyang, yijun, mhocko,
akpm, dianders, maobibo, xry111, zhaotianrui, nathan, yangtiezhu,
zhoubinbin
Cc: loongarch, linux-doc, linux-kernel, Huacai Chen
On Tue, Aug 13 2024 at 16:54, Tianyang Zhang wrote:
Where is patch 2/2 ?
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains
2024-08-14 10:41 ` Thomas Gleixner
@ 2024-08-15 1:13 ` Tianyang Zhang
2024-08-15 8:53 ` Thomas Gleixner
0 siblings, 1 reply; 7+ messages in thread
From: Tianyang Zhang @ 2024-08-15 1:13 UTC (permalink / raw)
To: Thomas Gleixner, corbet, alexs, chenhuacai, kernel, jiaxun.yang,
gaoliang, wangliupu, lvjianmin, yijun, mhocko, akpm, dianders,
maobibo, xry111, zhaotianrui, nathan, yangtiezhu, zhoubinbin
Cc: loongarch, linux-doc, linux-kernel, Huacai Chen
https://lore.kernel.org/all/20240813085427.20194-1-zhangtianyang@loongson.cn/
在 2024/8/14 下午6:41, Thomas Gleixner 写道:
> On Tue, Aug 13 2024 at 16:54, Tianyang Zhang wrote:
>
> Where is patch 2/2 ?
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains
2024-08-15 1:13 ` Tianyang Zhang
@ 2024-08-15 8:53 ` Thomas Gleixner
2024-08-15 10:43 ` Tianyang Zhang
0 siblings, 1 reply; 7+ messages in thread
From: Thomas Gleixner @ 2024-08-15 8:53 UTC (permalink / raw)
To: Tianyang Zhang, corbet, alexs, chenhuacai, kernel, jiaxun.yang,
gaoliang, wangliupu, lvjianmin, yijun, mhocko, akpm, dianders,
maobibo, xry111, zhaotianrui, nathan, yangtiezhu, zhoubinbin
Cc: loongarch, linux-doc, linux-kernel, Huacai Chen
On Thu, Aug 15 2024 at 09:13, Tianyang Zhang wrote:
> https://lore.kernel.org/all/20240813085427.20194-1-zhangtianyang@loongson.cn/
>
> 在 2024/8/14 下午6:41, Thomas Gleixner 写道:
>> On Tue, Aug 13 2024 at 16:54, Tianyang Zhang wrote:
>>
>> Where is patch 2/2 ?
Can you please thread your submissions properly and not send them
separately?
Thanks,
tglx
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains
2024-08-15 8:53 ` Thomas Gleixner
@ 2024-08-15 10:43 ` Tianyang Zhang
2024-08-15 10:51 ` Xi Ruoyao
0 siblings, 1 reply; 7+ messages in thread
From: Tianyang Zhang @ 2024-08-15 10:43 UTC (permalink / raw)
To: Thomas Gleixner, corbet, alexs, chenhuacai, kernel, jiaxun.yang,
gaoliang, wangliupu, lvjianmin, yijun, mhocko, akpm, dianders,
maobibo, xry111, zhaotianrui, nathan, yangtiezhu, zhoubinbin
Cc: loongarch, linux-doc, linux-kernel, Huacai Chen
Hi, Thomas
在 2024/8/15 下午4:53, Thomas Gleixner 写道:
> On Thu, Aug 15 2024 at 09:13, Tianyang Zhang wrote:
>> https://lore.kernel.org/all/20240813085427.20194-1-zhangtianyang@loongson.cn/
>>
>> 在 2024/8/14 下午6:41, Thomas Gleixner 写道:
>>> On Tue, Aug 13 2024 at 16:54, Tianyang Zhang wrote:
>>>
>>> Where is patch 2/2 ?
> Can you please thread your submissions properly and not send them
> separately?
>
> Thanks,
>
> tglx
I relearned the series of patches in the kernel submission guide. Now I
know how to generate the series-cover.
Can I resend all patches directly with a correct cover now?
Tianyang
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains
2024-08-15 10:43 ` Tianyang Zhang
@ 2024-08-15 10:51 ` Xi Ruoyao
2024-08-15 10:57 ` Tianyang Zhang
0 siblings, 1 reply; 7+ messages in thread
From: Xi Ruoyao @ 2024-08-15 10:51 UTC (permalink / raw)
To: Tianyang Zhang, Thomas Gleixner, corbet, alexs, chenhuacai,
kernel, jiaxun.yang, gaoliang, wangliupu, lvjianmin, yijun,
mhocko, akpm, dianders, maobibo, zhaotianrui, nathan, yangtiezhu,
zhoubinbin
Cc: loongarch, linux-doc, linux-kernel, Huacai Chen
On Thu, 2024-08-15 at 18:43 +0800, Tianyang Zhang wrote:
> Hi, Thomas
>
> 在 2024/8/15 下午4:53, Thomas Gleixner 写道:
> > On Thu, Aug 15 2024 at 09:13, Tianyang Zhang wrote:
> > > https://lore.kernel.org/all/20240813085427.20194-1-zhangtianyang@loongson.cn/
> > >
> > > 在 2024/8/14 下午6:41, Thomas Gleixner 写道:
> > > > On Tue, Aug 13 2024 at 16:54, Tianyang Zhang wrote:
> > > >
> > > > Where is patch 2/2 ?
> > Can you please thread your submissions properly and not send them
> > separately?
> >
> > Thanks,
> >
> > tglx
>
> I relearned the series of patches in the kernel submission guide. Now I
> know how to generate the series-cover.
>
> Can I resend all patches directly with a correct cover now?
Just version it v10. Using "resend" in the subject can sometimes cause
confusion, and there's no harm to bump the version number anyway even
without real code change.
--
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains
2024-08-15 10:51 ` Xi Ruoyao
@ 2024-08-15 10:57 ` Tianyang Zhang
0 siblings, 0 replies; 7+ messages in thread
From: Tianyang Zhang @ 2024-08-15 10:57 UTC (permalink / raw)
To: Xi Ruoyao, Thomas Gleixner, corbet, alexs, chenhuacai, kernel,
jiaxun.yang, gaoliang, wangliupu, lvjianmin, yijun, mhocko, akpm,
dianders, maobibo, zhaotianrui, nathan, yangtiezhu, zhoubinbin
Cc: loongarch, linux-doc, linux-kernel, Huacai Chen
在 2024/8/15 下午6:51, Xi Ruoyao 写道:
> On Thu, 2024-08-15 at 18:43 +0800, Tianyang Zhang wrote:
>> Hi, Thomas
>>
>> 在 2024/8/15 下午4:53, Thomas Gleixner 写道:
>>> On Thu, Aug 15 2024 at 09:13, Tianyang Zhang wrote:
>>>> https://lore.kernel.org/all/20240813085427.20194-1-zhangtianyang@loongson.cn/
>>>>
>>>> 在 2024/8/14 下午6:41, Thomas Gleixner 写道:
>>>>> On Tue, Aug 13 2024 at 16:54, Tianyang Zhang wrote:
>>>>>
>>>>> Where is patch 2/2 ?
>>> Can you please thread your submissions properly and not send them
>>> separately?
>>>
>>> Thanks,
>>>
>>> tglx
>> I relearned the series of patches in the kernel submission guide. Now I
>> know how to generate the series-cover.
>>
>> Can I resend all patches directly with a correct cover now?
> Just version it v10. Using "resend" in the subject can sometimes cause
> confusion, and there's no harm to bump the version number anyway even
> without real code change.
OK, I got it , thank you
^ permalink raw reply [flat|nested] 7+ messages in thread
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2024-08-13 8:54 [PATCH Loongarch-avec support V9 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains Tianyang Zhang
2024-08-14 10:41 ` Thomas Gleixner
2024-08-15 1:13 ` Tianyang Zhang
2024-08-15 8:53 ` Thomas Gleixner
2024-08-15 10:43 ` Tianyang Zhang
2024-08-15 10:51 ` Xi Ruoyao
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