From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 00D06273D6D; Fri, 12 Sep 2025 21:30:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757712659; cv=none; b=gqUBnKd/tNHK3oBdn++w0Qu4nKvJzb+u4qPViuH9OeHjXENRVMdAk7JFkrL1W48A4/Y5VtcKKZ7Wn4+80J1pStQaG1NlxvYU6B5VTRsg9NZv+uaWDfNurl3+eQcHi1oYQo3BvnybnnWlq5C1oBj86dUWqeVPayZQ07Vua0V3qAg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757712659; c=relaxed/simple; bh=ROOxPMoHZeX2C55B+T1892lm27mdEE7tXf8RWUdYD4s=; h=Date:Message-ID:From:To:Cc:Subject:In-Reply-To:References: MIME-Version:Content-Type; b=pyD7Iu168c/8ASzoJKnBmq/YU6iN2RE7xBoap38S8gqeFUx4ZG5o+Pe359CG6+UIZ7alporvPS2z1RrhiulGk/S4m3Ei/TnoKPJh5zPoV0MGwc+yBBD0SrUYcitm8Otck9dj/ZCstzDG5Z2GY1yRaF3ZoZGyRKnlDRUUpEMHMgE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NCQ4vNf6; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NCQ4vNf6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7F599C4CEF5; Fri, 12 Sep 2025 21:30:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757712658; bh=ROOxPMoHZeX2C55B+T1892lm27mdEE7tXf8RWUdYD4s=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=NCQ4vNf6J1KUx693QddwsDnduxLLflhhPbPEkncW3RejjdZYdMemWaPGwzK895scA FyWtRO+KFAZVF+KUZ/nSMCGg7Gw+WoUrbjeCeG1pzZWodGGYDUNzD9LhKF1ZCV4cMk efPG20V13+oix10lAReteVa0qUaaSiIsgwEKXZfPsox3Kwiq8CVqELdFirC4M/Mu+A ETN271tzU5OyQJDNIQdOvha65YOINhAb+ur3AktrnqoANgU9dOE1a2T1kqfyXj/5dV jjTMDDJitjHRibc7Q7/INfgoyrckQe1yZef4IX2iefNuIHZEA/Fb+8QalMbFtTzFao EzEzQd+iPJvtQ== Received: from ip-185-104-136-29.ptr.icomera.net ([185.104.136.29] helo=lobster-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1uxBM7-00000005pJX-3RCo; Fri, 12 Sep 2025 21:30:55 +0000 Date: Fri, 12 Sep 2025 22:30:53 +0100 Message-ID: <87frcrz7ci.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: Catalin Marinas , Will Deacon , Oliver Upton , Joey Gouly , Suzuki K Poulose , Shuah Khan , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v16 2/6] KVM: arm64: Manage GCS access and registers for guests In-Reply-To: References: <20250912-arm64-gcs-v16-0-6435e5ec37db@kernel.org> <20250912-arm64-gcs-v16-2-6435e5ec37db@kernel.org> <865xdndgpw.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.104.136.29 X-SA-Exim-Rcpt-To: broonie@kernel.org, catalin.marinas@arm.com, will@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, shuah@kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 12 Sep 2025 17:33:36 +0100, Mark Brown wrote: > > On Fri, Sep 12, 2025 at 12:59:23PM +0100, Marc Zyngier wrote: > > On Fri, 12 Sep 2025 10:25:28 +0100, > > Mark Brown wrote: > > > > MAPPED_EL2_SYSREG(PIR_EL2, PIR_EL1, NULL ); > > > MAPPED_EL2_SYSREG(PIRE0_EL2, PIRE0_EL1, NULL ); > > > MAPPED_EL2_SYSREG(POR_EL2, POR_EL1, NULL ); > > > + MAPPED_EL2_SYSREG(GCSCR_EL2, GCSCR_EL1, NULL ); > > > + MAPPED_EL2_SYSREG(GCSPR_EL2, GCSPR_EL1, NULL ); > > > MAPPED_EL2_SYSREG(AMAIR_EL2, AMAIR_EL1, NULL ); > > > MAPPED_EL2_SYSREG(ELR_EL2, ELR_EL1, NULL ); > > > MAPPED_EL2_SYSREG(SPSR_EL2, SPSR_EL1, NULL ); > > > Just like the previous version, you're missing the accessors that > > would be this table useful. Meaning that the vcpu_read_sys_reg() and > > vcpu_write_sys_reg() accessors will fail for all 4 GSC registers. > > Just to confirm, this is __vcpu_{read,write}_sysreg()? No. vcpu_{read,write}_sys_reg() and co are the broken high-level accessors. __vcpu_{read,write}_sysreg() call into those depending on the context, and __vcpu_{read,write}_sys_reg_{to,from}_cpu() have now been removed and replaced by similar (but private) accessors. See -rc4 for the details. In any case, a bunch of register accesses in this series are broken, as they don't respect the register life cycle of the guest. M. -- Jazz isn't dead. It just smells funny.