From: Thomas Gleixner <tglx@linutronix.de>
To: Huacai Chen <chenhuacai@kernel.org>
Cc: Tianyang Zhang <zhangtianyang@loongson.cn>,
corbet@lwn.net, alexs@kernel.org, kernel@xen0n.name,
jiaxun.yang@flygoat.com, gaoliang@loongson.cn,
wangliupu@loongson.cn, lvjianmin@loongson.cn, yijun@loongson.cn,
mhocko@suse.com, akpm@linux-foundation.org,
dianders@chromium.org, maobibo@loongson.cn, xry111@xry111.site,
zhaotianrui@loongson.cn, nathan@kernel.org,
yangtiezhu@loongson.cn, zhoubinbin@loongson.cn,
loongarch@lists.linux.dev, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org,
Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH v10 2/2] irqchip/loongarch-avec: Add AVEC irqchip support
Date: Thu, 22 Aug 2024 22:52:14 +0200 [thread overview]
Message-ID: <87r0aggu0x.ffs@tglx> (raw)
In-Reply-To: <CAAhV-H4umZBXAugRm45=dewiTGjpDSJf2wnjCtkakk+xG3VLHg@mail.gmail.com>
Huacai!
On Thu, Aug 22 2024 at 19:53, Huacai Chen wrote:
> On Wed, Aug 21, 2024 at 10:31 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>>
>> On Wed, Aug 21 2024 at 21:14, Huacai Chen wrote:
>> > On Wed, Aug 21, 2024 at 12:29 AM Thomas Gleixner <tglx@linutronix.de> wrote:
>> >> This patch is doing too many things at once and is absolutely not
>> >> reviewable.
>> >>
>> >> Please split it up into the obvious bits and pieces:
>> > Splitting may cause another problem: some patches will get upstream
>> > via the arch tree and others via the irq tree. These dependencies may
>> > cause build errors in a certain tree. But anyway, we will try our best
>> > to do this.
>>
>> That's not a problem at all. The trivial way to solve this is to apply
>> the architecture changes to the loongarch tree in a separate branch
>> which is based of some -rcX tag and only contains those dependencies.
>> That branch is then merged into the main loongarch branch and I can pull
>> it in to my tree for adding the irqchip changes. No conflicts, no merge
>> dependencies, nothing.
> Emm, another way is apply all patches to the irq tree with my Acked-by.
Correct, but that has the potential of creating conflicts when the
loongarch tree grows changes in the same areas.
>> > These macros are not in hot-path, and we have already tried our best
>> > to avoid using #ifdefs for cpu_has_xxx, so I suggest not introduce a
>> > new Kconfig option. Moreover, the new option should always be selected
>> > due to the deep coupling among loongson's irqchips, which makes the
>> > #ifdefs useless.
>>
>> They are removed in step 8 again. It's for having a sanely split up and
>> structured patch series instead of one big lump.
> I see, but I'm trying another splitting way to avoid
> adding-and-then-removing, of course it should also make reviews easy.
That's the whole point of the exercise.
>> The complexity of the x86 allocation/activate/set_affinity mechanisms
>> is there for a reason and not just because we did not have anything
>> better to do. :)
>
> Frankly, I haven't absorbed everything here, but I think I can try to
> answer my question "can irq_create_affinity_masks() still work".
>
> irq_create_affinity_masks() can still mark interrupts "managed" if
> avecintc driver doesn't support "managed", but it cannot guarantee
> that set_affinity can always succeed. If the destination cpu has a
> free vector, then set_affinity succeeds, otherwise it will fail. But
> if avecintc driver supports "managed", set_affinity can always
> succeed, because the destination cpu has already reserved a vector for
> this. Am I right?
It can work by some definition of "works", but in case of vector
exhaustion it will fail which is contrary to the purpose of managed
interrupts.
The matrix allocator already provides all the infrastructure and the
x86 reference implementation does the right thing. So why do you want to
shortcut that and make loongarch a special snowflake?
Thanks,
tglx
prev parent reply other threads:[~2024-08-22 20:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-15 11:26 [PATCH v10 0/2] Loongarch-avec support Tianyang Zhang
2024-08-15 11:26 ` [PATCH v10 1/2] irqchip/loongson-pch-msi: Switch to MSI parent domains Tianyang Zhang
2024-08-15 11:26 ` [PATCH v10 2/2] irqchip/loongarch-avec: Add AVEC irqchip support Tianyang Zhang
2024-08-20 16:29 ` Thomas Gleixner
2024-08-21 1:47 ` Tianyang Zhang
2024-08-21 13:14 ` Huacai Chen
2024-08-21 14:31 ` Thomas Gleixner
2024-08-22 11:53 ` Huacai Chen
2024-08-22 20:52 ` Thomas Gleixner [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87r0aggu0x.ffs@tglx \
--to=tglx@linutronix.de \
--cc=akpm@linux-foundation.org \
--cc=alexs@kernel.org \
--cc=chenhuacai@kernel.org \
--cc=chenhuacai@loongson.cn \
--cc=corbet@lwn.net \
--cc=dianders@chromium.org \
--cc=gaoliang@loongson.cn \
--cc=jiaxun.yang@flygoat.com \
--cc=kernel@xen0n.name \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=loongarch@lists.linux.dev \
--cc=lvjianmin@loongson.cn \
--cc=maobibo@loongson.cn \
--cc=mhocko@suse.com \
--cc=nathan@kernel.org \
--cc=wangliupu@loongson.cn \
--cc=xry111@xry111.site \
--cc=yangtiezhu@loongson.cn \
--cc=yijun@loongson.cn \
--cc=zhangtianyang@loongson.cn \
--cc=zhaotianrui@loongson.cn \
--cc=zhoubinbin@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).