From: Conor Dooley <conor@kernel.org>
To: Evan Green <evan@rivosinc.com>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
slewis@rivosinc.com, heiko@sntech.de, vineetg@rivosinc.com,
Conor Dooley <conor.dooley@microchip.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Andrew Bresticker <abrestic@rivosinc.com>,
Celeste Liu <coelacanthus@outlook.com>,
Guo Ren <guoren@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v4 3/6] RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA
Date: Wed, 22 Mar 2023 15:35:59 +0000 [thread overview]
Message-ID: <8e132bed-c85a-4bfd-bff8-5147db1cec32@spud> (raw)
In-Reply-To: <20230314183220.513101-4-evan@rivosinc.com>
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On Tue, Mar 14, 2023 at 11:32:17AM -0700, Evan Green wrote:
> We have an implicit set of base behaviors that userspace depends on,
> which are mostly defined in various ISA specifications.
>
> Co-developed-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> Signed-off-by: Evan Green <evan@rivosinc.com>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> @@ -125,6 +126,25 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair,
> case RISCV_HWPROBE_KEY_MIMPID:
> hwprobe_arch_id(pair, cpus);
> break;
> + /*
> + * The kernel already assumes that the base single-letter ISA
> + * extensions are supported on all harts, and only supports the
> + * IMA base, so just cheat a bit here and tell that to
> + * userspace.
> + */
> + case RISCV_HWPROBE_KEY_BASE_BEHAVIOR:
> + pair->value = RISCV_HWPROBE_BASE_BEHAVIOR_IMA;
> + break;
> +
> + case RISCV_HWPROBE_KEY_IMA_EXT_0:
> + pair->value = 0;
> + if (has_fpu())
> + pair->value |= RISCV_HWPROBE_IMA_FD;
> +
> + if (elf_hwcap & RISCV_ISA_EXT_c)
Random thought while reviewing another patch, and I kinda felt a bit
stupid following the existing code to try and make sure, but should this
become a call to riscv_isa_extension_available(NULL, c)?
It may be nice to propagate that helper, if it works, than check the bit
directly.
Cheers,
Conor.
> + pair->value |= RISCV_HWPROBE_IMA_C;
> +
> + break;
>
> /*
> * For forward compatibility, unknown keys don't fail the whole
> --
> 2.25.1
>
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next prev parent reply other threads:[~2023-03-22 15:36 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-14 18:32 [PATCH v4 0/6] RISC-V Hardware Probing User Interface Evan Green
2023-03-14 18:32 ` [PATCH v4 2/6] RISC-V: Add a syscall for HW probing Evan Green
2023-03-21 20:23 ` Heiko Stübner
2023-03-14 18:32 ` [PATCH v4 3/6] RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA Evan Green
2023-03-21 16:41 ` Heiko Stübner
2023-03-22 16:17 ` Evan Green
2023-03-21 20:25 ` Heiko Stübner
2023-03-22 15:35 ` Conor Dooley [this message]
2023-03-22 16:04 ` Evan Green
2023-03-14 18:32 ` [PATCH v4 4/6] RISC-V: hwprobe: Support probing of misaligned access performance Evan Green
2023-03-17 10:08 ` Heiko Stübner
2023-03-21 15:35 ` Evan Green
2023-03-18 12:02 ` Conor Dooley
2023-03-21 20:27 ` Heiko Stübner
2023-03-21 20:32 ` [PATCH v4 0/6] RISC-V Hardware Probing User Interface Heiko Stübner
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