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From: "Bowman, Terry" <terry.bowman@amd.com>
To: Lukas Wunner <lukas@wunner.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Dan Williams <djbw@kernel.org>, Dave Jiang <dave.jiang@intel.com>,
	Ira Weiny <iweiny@kernel.org>,
	Jonathan Cameron <jic23@kernel.org>, Len Brown <lenb@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Robert Richter <rrichter@amd.com>,
	linux-acpi@vger.kernel.org, linux-cxl@vger.kernel.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	Alejandro Lucero <alucerop@amd.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Ankit Agrawal <ankita@nvidia.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Ben Cheatham <Benjamin.Cheatham@amd.com>,
	Borislav Petkov <bp@alien8.de>, Breno Leitao <leitao@debian.org>,
	Davidlohr Bueso <dave@stgolabs.net>,
	"Fabio M . De Francesco" <fabio.m.de.francesco@linux.intel.com>,
	Gregory Price <gourry@gourry.net>,
	Hanjun Guo <guohanjun@huawei.com>,
	Jonathan Corbet <corbet@lwn.net>, Kees Cook <kees@kernel.org>,
	Kuppuswamy Sathyanarayanan
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	Li Ming <ming.li@zohomail.com>,
	Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Oliver O'Halloran <oohall@gmail.com>,
	Shiju Jose <shiju.jose@huawei.com>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Shuai Xue <xueshuai@linux.alibaba.com>,
	Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
	Tony Luck <tony.luck@intel.com>,
	Vishal Verma <vishal.l.verma@intel.com>,
	"linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v18 11/13] PCI: Cache PCI DSN into pci_dev->dsn during probe
Date: Mon, 20 Jul 2026 10:48:06 -0500	[thread overview]
Message-ID: <91e35807-9483-45f5-b4a8-0388aa48ff6f@amd.com> (raw)
In-Reply-To: <alsk97jVqw9jbRdQ@wunner.de>

On 7/18/2026 2:02 AM, Lukas Wunner wrote:
> On Fri, Jul 17, 2026 at 05:27:04PM -0500, Terry Bowman wrote:
>> Add a u64 dsn field to struct pci_dev and populate it from pci_get_dsn()
>> during pci_init_capabilities() at probe time via pci_dsn_init(). Only
>> write dev->dsn when the read succeeds. The zero initial value from
>> pci_dev allocation already represents 'no DSN available.'
> 
> The DSN is already cached on (natively handled) PCIe hotplug ports
> to detect device replacement during system sleep, see struct controller
> in drivers/pci/hotplug/pciehp.h.
> 
> Please remove that member from struct controller, remove the two
> assignments to the member in pciehp_configure_device() and pcie_init()
> and change the comparison in pciehp_device_replaced() to use the new
> member in struct pci_dev.  You can do this either as part of this patch
> or in a separate patch.
> 
> Thanks,
> 
> Lukas

Hi Lukas,

Thanks for reviewing. Is this the changes you want?

diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index debc79b0adfb2..12ec050d8a0fb 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -90,7 +90,6 @@ extern int pciehp_poll_time;
  */
 struct controller {
        struct pcie_device *pcie;
-       u64 dsn;
 
        u32 slot_cap;                           /* capabilities and quirks */
        unsigned int inband_presence_disabled:1;
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 4c62140a3cb44..c07957e0b37a8 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -587,7 +587,7 @@ bool pciehp_device_replaced(struct controller *ctrl)
             reg != (pdev->subsystem_vendor | (pdev->subsystem_device << 16))))
                return true;
 
-       if (pci_get_dsn(pdev) != ctrl->dsn)
+       if (pci_get_dsn(pdev) != pdev->dsn)
                return true;
 
        return false;
@@ -1086,8 +1086,6 @@ struct controller *pcie_init(struct pcie_device *dev)
        }
 
        pdev = pci_get_slot(subordinate, PCI_DEVFN(0, 0));
-       if (pdev)
-               ctrl->dsn = pci_get_dsn(pdev);
        pci_dev_put(pdev);
 
        return ctrl;
diff --git a/drivers/pci/hotplug/pciehp_pci.c b/drivers/pci/hotplug/pciehp_pci.c
index 65e50bee1a8c0..065e1f7c9a7bd 100644
--- a/drivers/pci/hotplug/pciehp_pci.c
+++ b/drivers/pci/hotplug/pciehp_pci.c
@@ -73,7 +73,6 @@ int pciehp_configure_device(struct controller *ctrl)
        down_read_nested(&ctrl->reset_lock, ctrl->depth);
 
        dev = pci_get_slot(parent, PCI_DEVFN(0, 0));
-       ctrl->dsn = pci_get_dsn(dev);
        pci_dev_put(dev);
 
  out:

-Terry

  reply	other threads:[~2026-07-20 15:48 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-17 22:26 [PATCH v18 00/13] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2026-07-17 22:26 ` [PATCH v18 01/13] cxl/ras: Fix cxl_rch_get_aer_severity() wrong severity register Terry Bowman
2026-07-20 20:09   ` Dave Jiang
2026-07-20 20:36     ` Bowman, Terry
2026-07-20 21:26   ` Jonathan Cameron
2026-07-17 22:26 ` [PATCH v18 02/13] acpi/apei/ghes: Use raw_spinlock_t for CXL CPER work locks Terry Bowman
2026-07-20 20:12   ` Dave Jiang
2026-07-20 20:38     ` Bowman, Terry
2026-07-20 21:41   ` Jonathan Cameron
2026-07-17 22:26 ` [PATCH v18 03/13] cxl: Tighten CPER kfifo registration API and symbol visibility Terry Bowman
2026-07-20 20:15   ` Dave Jiang
2026-07-20 21:59   ` Jonathan Cameron
2026-07-17 22:26 ` [PATCH v18 04/13] cxl: Rename find_cxl_port() to find_cxl_port_by_dport() Terry Bowman
2026-07-20 20:25   ` Dave Jiang
2026-07-20 22:02   ` Jonathan Cameron
2026-07-17 22:26 ` [PATCH v18 05/13] PCI/AER: Introduce AER-CXL protocol error kfifo Terry Bowman
2026-07-20 20:29   ` Dave Jiang
2026-07-20 22:41   ` Jonathan Cameron
2026-07-17 22:26 ` [PATCH v18 06/13] PCI: Establish common CXL Port protocol error flow Terry Bowman
2026-07-20 20:44   ` Dave Jiang
2026-07-20 23:05   ` Jonathan Cameron
2026-07-17 22:27 ` [PATCH v18 07/13] PCI/CXL: Add RCH support to CXL handlers Terry Bowman
2026-07-20 21:47   ` Dave Jiang
2026-07-20 23:12   ` Jonathan Cameron
2026-07-17 22:27 ` [PATCH v18 08/13] cxl/pci: Thread port and dport through RAS handling helpers Terry Bowman
2026-07-20 22:15   ` Dave Jiang
2026-07-20 23:17   ` Jonathan Cameron
2026-07-17 22:27 ` [PATCH v18 09/13] cxl: Update CXL Endpoint AER handler Terry Bowman
2026-07-20 22:25   ` Dave Jiang
2026-07-20 23:29   ` Jonathan Cameron
2026-07-17 22:27 ` [PATCH v18 10/13] cxl: Add port and dport identifiers to CXL AER trace events Terry Bowman
2026-07-20 22:44   ` Dave Jiang
2026-07-21  0:00   ` Jonathan Cameron
2026-07-21 20:59     ` Bowman, Terry
2026-07-17 22:27 ` [PATCH v18 11/13] PCI: Cache PCI DSN into pci_dev->dsn during probe Terry Bowman
2026-07-18  7:02   ` Lukas Wunner
2026-07-20 15:48     ` Bowman, Terry [this message]
2026-07-21  8:37       ` Lukas Wunner
2026-07-17 22:27 ` [PATCH v18 12/13] PCI/CXL: Mask/Unmask CXL protocol errors Terry Bowman
2026-07-20 22:52   ` Dave Jiang
2026-07-21  0:10   ` Jonathan Cameron
2026-07-17 22:27 ` [PATCH v18 13/13] Documentation: cxl: Document CXL protocol error handling Terry Bowman
2026-07-20 23:40   ` Dave Jiang
2026-07-21  0:19   ` Jonathan Cameron

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