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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2d096cd25fesm295633fac.38.2025.04.09.10.22.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 09 Apr 2025 10:22:31 -0700 (PDT) Message-ID: <97d0cc16-cdd4-449c-87f5-f62e0515de97@baylibre.com> Date: Wed, 9 Apr 2025 12:22:30 -0500 Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/4] iio: adc: ad4000: Add support for SPI offload To: Marcelo Schmitt , linux-iio@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: jic23@kernel.org, lars@metafoo.de, Michael.Hennerich@analog.com, corbet@lwn.net, marcelo.schmitt1@gmail.com References: <386ce043a0e3fc9e8ff71f17aef8de128ce5869e.1743110188.git.marcelo.schmitt@analog.com> Content-Language: en-US From: David Lechner In-Reply-To: <386ce043a0e3fc9e8ff71f17aef8de128ce5869e.1743110188.git.marcelo.schmitt@analog.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 3/27/25 4:24 PM, Marcelo Schmitt wrote: > FPGA HDL projects can include a PWM generator in addition to SPI-Engine. > The PWM IP is used to trigger SPI-Engine offload modules that in turn set > SPI-Engine to execute transfers to poll data from the ADC. That allows data > to be read at the maximum sample rates. Also, it is possible to set a > specific sample rate by setting the proper PWM duty cycle and related state > parameters, thus allowing an adjustable ADC sample rate when a PWM (offload > trigger) is used in combination with SPI-Engine. > > Add support for SPI offload. > > Signed-off-by: Marcelo Schmitt > --- I think I spotted a bug. With that fixed... Reviewed-by: David Lechner > @@ -690,6 +942,15 @@ static int ad4000_prepare_3wire_mode_message(struct ad4000_state *st, > > xfers[1].rx_buf = &st->scan.data; > xfers[1].len = BITS_TO_BYTES(chan->scan_type.storagebits); Now this needs to be: xfer->len = chan->scan_type.realbits > 16 ? 4 : 2; Otherwise when there is SPI offload, this could read 2 words because storagebits is always == 32. > + > + /* > + * If the device is set up for SPI offloading, IIO channel scan_type is > + * set to IIO_CPU. When that is the case, use larger SPI word sizes for > + * single-shot reads too. Thus, sample data can be correctly handled in > + * ad4000_single_conversion() according to scan_type endianness. > + */ > + if (chan->scan_type.endianness != IIO_BE) > + xfers[1].bits_per_word = chan->scan_type.realbits; > xfers[1].delay.value = st->time_spec->t_quiet2_ns; > xfers[1].delay.unit = SPI_DELAY_UNIT_NSECS; >