From: yunhui cui <cuiyunhui@bytedance.com>
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: ajones@ventanamicro.com, andybnac@gmail.com,
aou@eecs.berkeley.edu, charlie@rivosinc.com,
cleger@rivosinc.com, conor.dooley@microchip.com,
conor@kernel.org, corbet@lwn.net, evan@rivosinc.com,
jesse@rivosinc.com, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-riscv@lists.infradead.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, samuel.holland@sifive.com,
shuah@kernel.org
Subject: Re: [External] Re: [PATCH v5 0/3] Enable Zicbom in usermode
Date: Tue, 25 Feb 2025 21:27:00 +0800 [thread overview]
Message-ID: <CAEEQ3wkeLrTFVqVZEAYSsROSLHzkC-EeKvuPHmW=qH3CxamwhA@mail.gmail.com> (raw)
In-Reply-To: <CAHVXubhapunBD_+cZ=WeEp9GPJec795xOWSnMKmh_iSH09r2Yw@mail.gmail.com>
Hi Alex,
On Tue, Feb 25, 2025 at 9:21 PM Alexandre Ghiti <alexghiti@rivosinc.com> wrote:
>
> Hi Yunhui,
>
> On Wed, Jan 15, 2025 at 3:40 AM Yunhui Cui <cuiyunhui@bytedance.com> wrote:
> >
> > v1/v2:
> > There is only the first patch: RISC-V: Enable cbo.clean/flush in usermode,
> > which mainly removes the enabling of cbo.inval in user mode.
> >
> > v3:
> > Add the functionality of Expose Zicbom and selftests for Zicbom.
> >
> > v4:
> > Modify the order of macros, The test_no_cbo_inval function is added
> > separately.
> >
> > v5:
> > 1. Modify the order of RISCV_HWPROBE_KEY_ZICBOM_BLOCK_SIZE in hwprobe.rst
> > 2. "TEST_NO_ZICBOINVAL" -> "TEST_NO_CBO_INVAL"
> >
> > Yunhui Cui (3):
> > RISC-V: Enable cbo.clean/flush in usermode
> > RISC-V: hwprobe: Expose Zicbom extension and its block size
> > RISC-V: selftests: Add TEST_ZICBOM into CBO tests
> >
> > Documentation/arch/riscv/hwprobe.rst | 6 ++
> > arch/riscv/include/asm/hwprobe.h | 2 +-
> > arch/riscv/include/uapi/asm/hwprobe.h | 2 +
> > arch/riscv/kernel/cpufeature.c | 8 +++
> > arch/riscv/kernel/sys_hwprobe.c | 6 ++
> > tools/testing/selftests/riscv/hwprobe/cbo.c | 66 +++++++++++++++++----
> > 6 files changed, 78 insertions(+), 12 deletions(-)
> >
> > --
> > 2.39.2
> >
>
> So a v6 needs to be sent with:
>
> - the fix for hwprobe_ext0_has() reported by kernel test robot
> - a rebase on top of 6.14 since patch 2 will conflict with
> RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0
Thank you for the reminder. In fact, version 6 was sent out almost a
month ago. Reference:
https://lore.kernel.org/lkml/20250124035959.45499-1-cuiyunhui@bytedance.com/
>
> Do you think you can do that soon so that it gets merged in 6.15? The
> patchset received a lot of RB so it would be too bad to miss this
> release.
>
> Thanks,
>
> Alex
Thanks,
Yunhui
next prev parent reply other threads:[~2025-02-25 13:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-15 2:40 [PATCH v5 0/3] Enable Zicbom in usermode Yunhui Cui
2025-01-15 2:40 ` [PATCH v5 1/3] RISC-V: Enable cbo.clean/flush " Yunhui Cui
2025-01-15 2:40 ` [PATCH v5 2/3] RISC-V: hwprobe: Expose Zicbom extension and its block size Yunhui Cui
2025-01-15 9:17 ` Andrew Jones
2025-01-16 4:58 ` Samuel Holland
2025-01-21 15:05 ` kernel test robot
2025-01-21 15:29 ` Andrew Jones
2025-01-24 3:26 ` [External] " yunhui cui
2025-01-15 2:40 ` [PATCH v5 3/3] RISC-V: selftests: Add TEST_ZICBOM into CBO tests Yunhui Cui
2025-02-25 13:21 ` [PATCH v5 0/3] Enable Zicbom in usermode Alexandre Ghiti
2025-02-25 13:27 ` yunhui cui [this message]
2025-02-25 14:07 ` [External] " Alexandre Ghiti
2025-02-26 11:10 ` yunhui cui
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