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From: Anup Patel <apatel@ventanamicro.com>
To: Conor Dooley <conor@kernel.org>
Cc: Sunil V L <sunilvl@ventanamicro.com>,
	linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
	linux-pci@vger.kernel.org,
	Heikki Krogerus <heikki.krogerus@linux.intel.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Atish Kumar Patra <atishp@rivosinc.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Will Deacon <will@kernel.org>, Haibo Xu <haibo1.xu@intel.com>,
	Jonathan Corbet <corbet@lwn.net>, Marc Zyngier <maz@kernel.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Robert Moore <robert.moore@intel.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Daniel Scally <djrscally@gmail.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Sakari Ailus <sakari.ailus@linux.intel.com>,
	Anup Patel <anup@brainfault.org>, Len Brown <lenb@kernel.org>
Subject: Re: [RFC PATCH v1 20/21] RISC-V: ACPI: Create PLIC platform device
Date: Tue, 8 Aug 2023 16:27:16 +0530	[thread overview]
Message-ID: <CAK9=C2XZ7_tfSK6HNN1Em5fAHrknWBqGaD9gPL8yGs8AzE3vQg@mail.gmail.com> (raw)
In-Reply-To: <20230808-chalice-easing-1369c7386082@spud>

On Tue, Aug 8, 2023 at 2:12 PM Conor Dooley <conor@kernel.org> wrote:
>
> On Thu, Aug 03, 2023 at 11:29:15PM +0530, Sunil V L wrote:
> > Since PLIC needs to be a platform device
>
> For the unwashed, why does the PLCI need to be a platform device?
> (And while you're at that, please try to make use of the extra ~20
> characters per line that you can use here.)

As suggested by Marc Z, only timers and IPIs need to be probed early.
Everything else needs to be a platform device. The devlink feature of
Linux DD framework ensures that platform devices are probed in the
right order based on the interdependency.

The PATCH5 of the v7 AIA series converts the PLIC driver into a
platform driver. This works perfectly fine.

>
> > probe the
> > MADT and create platform devices for each PLIC in the
> > system. Use software node framework for the fwnode
> > which allows to create properties and hence the
> > actual irqchip driver doesn't need to do anything
> > different for ACPI vs DT.
> >
> > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> > Co-developed-by: Haibo Xu <haibo1.xu@intel.com>
> > Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
>
> > +static struct fwnode_handle *acpi_plic_create_fwnode(struct acpi_madt_plic *plic)
> > +{
> > +     struct fwnode_handle *fwnode, *parent_fwnode;
> > +     struct riscv_irqchip_list *plic_element;
> > +     struct software_node_ref_args *refs;
> > +     struct property_entry props[8] = {};
> > +     int nr_contexts;
> > +
> > +     props[0] = PROPERTY_ENTRY_U32("riscv,gsi-base", plic->gsi_base);
> > +     props[1] = PROPERTY_ENTRY_U32("riscv,ndev", plic->num_irqs);
> > +     props[2] = PROPERTY_ENTRY_U32("riscv,max_prio", plic->max_prio);
>
> My OCD wants to know why this gets an _ but the others have a -.
>
> > +     props[3] = PROPERTY_ENTRY_U8("riscv,plic-id", plic->id);
> > +     props[4] = PROPERTY_ENTRY_U64("riscv,plic-base", plic->base_addr);
> > +     props[5] = PROPERTY_ENTRY_U32("riscv,plic-size", plic->size);
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

Regards,
Anup

  reply	other threads:[~2023-08-08 19:09 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-03 17:58 [RFC PATCH v1 00/21] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2023-08-03 17:58 ` [RFC PATCH v1 01/21] ACPICA: MADT: Add RISC-V external interrupt controllers Sunil V L
2023-08-03 17:58 ` [RFC PATCH v1 02/21] ACPICA: RHCT: Add flags, CMO and MMU nodes Sunil V L
2023-08-03 17:58 ` [RFC PATCH v1 03/21] RISC-V: ACPI: Fix acpi_os_ioremap to return iomem address Sunil V L
2023-08-07  8:20   ` Andrew Jones
2023-08-03 17:58 ` [RFC PATCH v1 04/21] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping Sunil V L
2023-08-04  5:47   ` Andy Shevchenko
2023-08-04  8:19     ` Sunil V L
2023-08-07  8:41   ` Andrew Jones
2023-08-03 17:59 ` [RFC PATCH v1 05/21] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2023-08-04  5:53   ` Andy Shevchenko
2023-08-04  8:23     ` Sunil V L
2023-08-07 22:41   ` Bjorn Helgaas
2023-08-08  4:52     ` Sunil V L
2023-08-08 13:11       ` Andy Shevchenko
2023-08-08 13:11     ` Andy Shevchenko
2023-08-03 17:59 ` [RFC PATCH v1 06/21] RISC-V: ACPI: Implement PCI related functionality Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 07/21] RISC-V: Kconfig: Select ECAM and MCFG Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 08/21] RISC-V: ACPI: RHCT: Add function to get CBO block sizes Sunil V L
2023-08-04  6:00   ` Andy Shevchenko
2023-08-04  9:33     ` Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 09/21] RISC-V: cacheflush: Initialize CBO variables on ACPI systems Sunil V L
2023-08-04  5:56   ` Andy Shevchenko
2023-08-04  9:20     ` Sunil V L
2023-08-04 14:59       ` Andy Shevchenko
2023-08-04 15:19         ` Conor Dooley
2023-08-04 16:52           ` Andy Shevchenko
2023-08-04 16:56             ` Andy Shevchenko
2023-08-03 17:59 ` [RFC PATCH v1 10/21] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 11/21] swnode: Add support to create early during boot Sunil V L
2023-08-04  6:09   ` Andy Shevchenko
2023-08-04  8:11     ` Sunil V L
2023-08-08 13:17       ` Marc Zyngier
2023-08-09  5:44         ` Sunil V L
2023-08-08 13:06   ` Marc Zyngier
2023-08-03 17:59 ` [RFC PATCH v1 12/21] irqchip/riscv-intc: Use swnode framework to create fwnode Sunil V L
2023-08-08  8:31   ` Conor Dooley
2023-08-09  5:49     ` Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 13/21] irqchip/riscv-imsic-early: Add ACPI support Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 14/21] ACPI: bus: Add acpi_riscv_init function Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 15/21] ACPI: RISC-V: Create IMSIC platform device Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 16/21] ACPI: Add APLIC IRQ model for RISC-V Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 17/21] ACPI: RISC-V: Create APLIC platform device Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 18/21] irqchip/irq-riscv-aplic-msi: Add ACPI support Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 19/21] ACPI: bus: Add PLIC IRQ model Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 20/21] RISC-V: ACPI: Create PLIC platform device Sunil V L
2023-08-08  8:41   ` Conor Dooley
2023-08-08 10:57     ` Anup Patel [this message]
2023-08-08 11:30       ` Conor Dooley
2023-08-09  5:47     ` Sunil V L
2023-08-03 17:59 ` [RFC PATCH v1 21/21] irqchip/sifive-plic: Add GSI conversion support Sunil V L

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