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[209.85.222.44]) by smtp.gmail.com with ESMTPSA id ada2fe7eead31-4e77394bd3bsm6139299137.23.2025.06.10.02.16.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Jun 2025 02:16:41 -0700 (PDT) Received: by mail-ua1-f44.google.com with SMTP id a1e0cc1a2514c-87ed98a23easo464772241.0; Tue, 10 Jun 2025 02:16:41 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCV0WpwwFPS17YAfEFOydbs32YGAV7Rs/9qBoqIyWDUbz0tdDkIrUOPNIRzn/oelNKdO8Ww5GQCYwLlX@vger.kernel.org, AJvYcCVNtmoGy+hcBquTeKh1Pa3PjJf13gN9gE8k/Tol6ZuK6Ch/DALoYprAdVNT+WUx7DFJD7ULtbqDW7E=@vger.kernel.org, AJvYcCVlwME51ZzgE5fA+l/kS42EuxfYr4O8qqcvSnURO3nm4MT+Z1tGB9+ZiMjB7s+99o3n+vuhrKNagt4r0vnS38EvqI118Q==@vger.kernel.org, AJvYcCWFThk45PPY1ttQmv8ZR0v/TvxO6WlbP6L4yc5AUBz58dSny+Pcs0kd6HK0iqtkVJCL3quiJAE/nG1lMw==@vger.kernel.org, AJvYcCXDmmiGipFbRHY8UybXKCpvUy0eUWJqxXN0tawP767PsqBNY9bUXFZBy0WGJI1dWsMR9qh4WIgmrlX2Ok7m@vger.kernel.org X-Received: by 2002:a05:6102:943:b0:4e6:ddd0:9702 with SMTP id ada2fe7eead31-4e7729a3b75mr12821267137.15.1749547001193; Tue, 10 Jun 2025 02:16:41 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-doc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20250422234830.2840784-1-superm1@kernel.org> <20250422234830.2840784-3-superm1@kernel.org> In-Reply-To: <20250422234830.2840784-3-superm1@kernel.org> From: Geert Uytterhoeven Date: Tue, 10 Jun 2025 11:16:29 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: AX0GCFv1stbSgApzqPSScCybuPZoPnTcTv0OURpXKeqUfK7lSULXavQbaabojaE Message-ID: Subject: Re: [PATCH v5 2/5] i2c: piix4: Depends on X86 To: Mario Limonciello Cc: Borislav Petkov , Jean Delvare , Andi Shyti , =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , Jonathan Corbet , Mario Limonciello , Yazen Ghannam , Thomas Gleixner , Ingo Molnar , Dave Hansen , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "H . Peter Anvin" , Shyam Sundar S K , Hans de Goede , "open list:DOCUMENTATION" , open list , "open list:I2C/SMBUS CONTROLLER DRIVERS FOR PC" , "open list:AMD PMC DRIVER" , Ingo Molnar , linux-mips@vger.kernel.org, loongarch@lists.linux.dev Content-Type: text/plain; charset="UTF-8" Hi Mario, CC mips, loongarch On Wed, 23 Apr 2025 at 01:49, Mario Limonciello wrote: > From: Mario Limonciello > > PIIX4 and compatible controllers are only for X86. As some headers are > being moved into x86 specific headers PIIX4 won't compile on non-x86. > > Suggested-by: Ingo Molnar > Signed-off-by: Mario Limonciello Thanks for your patch, which is now commit 7e173eb82ae97175 ("i2c: piix4: Make CONFIG_I2C_PIIX4 dependent on CONFIG_X86") in v6.16-rc1. > --- a/drivers/i2c/busses/Kconfig > +++ b/drivers/i2c/busses/Kconfig > @@ -200,7 +200,7 @@ config I2C_ISMT > > config I2C_PIIX4 > tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)" > - depends on PCI && HAS_IOPORT > + depends on PCI && HAS_IOPORT && X86 Are you sure this south-bridge is not used on non-x86 platforms? It is enabled in several non-x86 defconfigs: arch/loongarch/configs/loongson3_defconfig:CONFIG_I2C_PIIX4=y arch/mips/configs/ip27_defconfig:CONFIG_I2C_PIIX4=m arch/mips/configs/loongson2k_defconfig:CONFIG_I2C_PIIX4=y arch/mips/configs/loongson3_defconfig:CONFIG_I2C_PIIX4=y The loongarch and loongson entries are probably bogus, but I wouldn't be surprised if the SGI Onyx and Origin do use Intel south-bridges. > select I2C_SMBUS > help > If you say yes to this option, support will be included for the Intel Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds