From: Sean Christopherson <seanjc@google.com>
To: Kim Phillips <kim.phillips@amd.com>
Cc: x86@kernel.org, Babu Moger <Babu.Moger@amd.com>,
Borislav Petkov <bp@alien8.de>, Borislav Petkov <bp@suse.de>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
Joao Martins <joao.m.martins@oracle.com>,
Jonathan Corbet <corbet@lwn.net>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
David Woodhouse <dwmw@amazon.co.uk>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Juergen Gross <jgross@suse.com>,
Peter Zijlstra <peterz@infradead.org>,
Tony Luck <tony.luck@intel.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Alexey Kardashevskiy <aik@amd.com>,
kvm@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 4/7] x86/cpu, kvm: Move CPUID 0x80000021 EAX feature bits propagation to kvm_set_cpu_caps
Date: Wed, 30 Nov 2022 00:13:09 +0000 [thread overview]
Message-ID: <Y4agFT6OwvZzSgn1@google.com> (raw)
In-Reply-To: <20221129235816.188737-5-kim.phillips@amd.com>
() after function names, i.e. kvm_set_cpu_caps().
On Tue, Nov 29, 2022, Kim Phillips wrote:
> Since they're now all scattered, group CPUID 0x80000021 EAX feature bits
Nit, scattering feature bits isn't required to use KVM's reverse CPUID magic,
e.g. see commit 047c72299061 ("KVM: x86: Update KVM-only leaf handling to allow
for 100% KVM-only leafs") that's sitting in kvm/queue.
The real justification for this patch is that open coding numbers is error prone
and is very frowned upon in KVM.
> propagation to kvm_set_cpu_caps instead of open-coding them in
kvm_set_cpu_caps()
> __do_cpuid_func().
>
> Signed-off-by: Kim Phillips <kim.phillips@amd.com>
> ---
> arch/x86/kvm/cpuid.c | 35 ++++++++++++++++++++---------------
> arch/x86/kvm/reverse_cpuid.h | 22 ++++++++++++++++------
> 2 files changed, 36 insertions(+), 21 deletions(-)
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index c92c49a0b35b..8e37760cea1b 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -730,6 +730,25 @@ void kvm_set_cpu_caps(void)
> 0 /* SME */ | F(SEV) | 0 /* VM_PAGE_FLUSH */ | F(SEV_ES) |
> F(SME_COHERENT));
>
> + /*
> + * Pass down these bits:
> + * EAX 0 NNDBP, Processor ignores nested data breakpoints
> + * EAX 2 LAS, LFENCE always serializing
> + * EAX 6 NSCB, Null selector clear base
> + * EAX 8 Automatic IBRS
Automatic IBRS isn't advertised as of this patch. Just drop the comment, it's
guaranteed to become stale at some point, and one of the main reasons for the
flag magic is so that the code is self-documenting, i.e. so that we don't need
comments like this.
> + *
> + * Other defined bits are for MSRs that KVM does not expose:
> + * EAX 3 SPCL, SMM page configuration lock
> + * EAX 13 PCMSR, Prefetch control MSR
> + */
> + kvm_cpu_cap_init_scattered(CPUID_8000_0021_EAX,
> + SF(NO_NESTED_DATA_BP) | SF(LFENCE_RDTSC) |
> + SF(NULL_SEL_CLR_BASE));
Please follow the established style, e.g.
kvm_cpu_cap_init_scattered(CPUID_8000_0021_EAX,
SF(NO_NESTED_DATA_BP) | SF(LFENCE_RDTSC) | SF(NULL_SEL_CLR_BASE)
);
> + if (cpu_feature_enabled(X86_FEATURE_LFENCE_RDTSC))
I highly doubt it matters, but using cpu_feature_enabled() instead of static_cpu_has()
is an unrelated change. At the very least, it should be mentioned in the changelog.
> + kvm_cpu_cap_set(X86_FEATURE_LFENCE_RDTSC);
> + if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
> + kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE);
> +
> kvm_cpu_cap_mask(CPUID_C000_0001_EDX,
> F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
> F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
next prev parent reply other threads:[~2022-11-30 0:13 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-29 23:58 [PATCH v3 0/7] x86/cpu, kvm: Support AMD Automatic IBRS Kim Phillips
2022-11-29 23:58 ` [PATCH v3 1/7] x86/cpu, kvm: Define a scattered No Nested Data Breakpoints feature bit Kim Phillips
2022-11-30 0:05 ` Sean Christopherson
2022-11-29 23:58 ` [PATCH v3 2/7] x86/cpu, kvm: Define a scattered Null Selector Clears Base " Kim Phillips
2022-11-29 23:58 ` [PATCH v3 3/7] x86/cpu, kvm: Make X86_FEATURE_LFENCE_RDTSC a scattered " Kim Phillips
2022-11-29 23:58 ` [PATCH v3 4/7] x86/cpu, kvm: Move CPUID 0x80000021 EAX feature bits propagation to kvm_set_cpu_caps Kim Phillips
2022-11-30 0:13 ` Sean Christopherson [this message]
2022-11-29 23:58 ` [PATCH v3 5/7] x86/cpu, kvm: Define a scattered AMD Automatic IBRS feature bit Kim Phillips
2022-11-29 23:58 ` [PATCH v3 6/7] x86/cpu, kvm: Support AMD Automatic IBRS Kim Phillips
2022-11-30 20:36 ` Pawan Gupta
2022-11-29 23:58 ` [PATCH v3 7/7] x86/cpu, kvm: Propagate the AMD Automatic IBRS feature to the guest Kim Phillips
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