From: Conor Dooley <conor@kernel.org>
To: Palmer Dabbelt <palmer@dabbelt.com>, linux-riscv@lists.infradead.org
Cc: Conor Dooley <conor.dooley@microchip.com>,
ajones@ventanamicro.com, aou@eecs.berkeley.edu, corbet@lwn.net,
guoren@kernel.org, heiko@sntech.de, paul.walmsley@sifive.com,
linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org
Subject: Re: [PATCH v1 3/3] Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo
Date: Wed, 30 Nov 2022 23:46:28 +0000 [thread overview]
Message-ID: <Y4frVOhMt/gkuSY2@spud> (raw)
In-Reply-To: <20221130234125.2722364-4-conor@kernel.org>
On Wed, Nov 30, 2022 at 11:41:26PM +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> The RISC-V specs are permissive in what they allow as the ISA string,
> but how we output this to userspace in /proc/cpuinfo is quasi uAPI.
>
> Formalise this as part of the uAPI, by documenting the list of rules
> we use at this point in time.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> I've not "tested" these docs. The NIPA-esque pwbot should go and
> test it AFAICT. If it doesn't, I'll go add that.
> ---
> Documentation/riscv/uabi.rst | 42 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/Documentation/riscv/uabi.rst b/Documentation/riscv/uabi.rst
> index 21a82cfb6c4d..bc3c8ced644b 100644
> --- a/Documentation/riscv/uabi.rst
> +++ b/Documentation/riscv/uabi.rst
> @@ -3,4 +3,46 @@
> RISC-V Linux User ABI
> =====================
>
> +Misaligned accesses
> +-------------------
> +
> Misaligned accesses are supported in userspace, but they may perform poorly.
> +
> +ISA string ordering in /proc/cpuinfo
> +------------------------------------
> +
> +The canonical order of ISA extension names in the ISA string is defined in
> +chapter 27 of the unprivileged specification.
> +The specification uses vague wording, such as should, when it comes to
> +ordering, so for our purposes the following rules apply:
> +
> +#. Single-letter extensions come first, in "canonical order", so
> + "IMAFDQLCBKJTPVH".
> +
> +#. All multi-letter extensions will be separated from other multi-letter
> + extensions by an underscore.
> +
> +#. Additional standard extensions (starting with 'Z') will be sorted after
> + single-letter extensions and before any higher-privileged extensions.
> +
> +#. The first letter following the 'Z' conventionally indicates the most
> + closely related alphabetical extension category, IMAFDQLCBKJTPVH.
> + If multiple 'Z' extensions are named, they should be ordered first by
> + category, then alphabetically within a category.
> +
> +#. Standard supervisor-level extensions (starting with 'S') will be listed
> + after standard unprivileged extensions. If multiple
> + supervisor-level extensions are listed, they will be ordered
> + alphabetically.
> +
> +#. Standard machine-level extensions (starting with 'Zxm') will be listed
> + after any lower-privileged, standard extensions. If multiple
> + machine-level extensions are listed, they will be ordered
> + alphabetically.
> +
> +#. Non-standard extensions (starts with 'X') will be listed after all
Ehh, it's always the read *after* sending something that I notice the
inconsistency. This should be s/starts/starting/ for consistency.
> + standard extensions.
> +
> +An example string following the order is:
> + rv64imadc_zifoo_zigoo_zafoo_sbar_scar_zxmbaz_xqux_xrux
> +
> --
> 2.38.1
>
next prev parent reply other threads:[~2022-11-30 23:46 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-30 23:41 [PATCH v1 0/3] Putting some basic order on isa extension lists Conor Dooley
2022-11-30 23:41 ` [PATCH v1 1/3] RISC-V: clarify ISA string ordering rules in cpu.c Conor Dooley
2022-12-01 8:27 ` Andrew Jones
2022-12-01 8:48 ` Conor Dooley
2022-11-30 23:41 ` [PATCH v1 2/3] RISC-V: resort all extensions in consistent orders Conor Dooley
2022-12-01 9:00 ` Andrew Jones
2022-12-01 10:47 ` Heiko Stübner
2022-12-01 11:38 ` Andrew Jones
2022-12-01 12:29 ` Conor Dooley
2022-12-01 12:37 ` Conor.Dooley
2022-12-01 10:48 ` Heiko Stübner
2022-11-30 23:41 ` [PATCH v1 3/3] Documentation: riscv: add a section about ISA string ordering in /proc/cpuinfo Conor Dooley
2022-11-30 23:46 ` Conor Dooley [this message]
2022-12-01 3:05 ` Bagas Sanjaya
2022-12-01 8:17 ` Conor Dooley
2022-12-02 2:14 ` Bagas Sanjaya
2022-12-02 11:37 ` Conor Dooley
2022-12-01 9:14 ` Andrew Jones
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